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authorJamie Lentin <jm@lentin.co.uk>2009-03-19 21:54:12 +0000
committerFrancisco Jerez <currojerez@riseup.net>2009-03-20 00:26:25 +0100
commit6691678b5f04d52a1e08f9eaa6d511df9b7eeb4d (patch)
tree1ca02e943d4513bfcb683b3f2a7b4f157ab12ffc
parent05480382c508bd27c1755405518ce9c339f0f80e (diff)
Stop clearing of "VESA compliance power down mode" bit
Clearing this bit causes an OQO 01+ w/SMI720 to power down the LCD, leave it alone. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
-rw-r--r--src/smilynx_hw.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/smilynx_hw.c b/src/smilynx_hw.c
index 158e20f..019261d 100644
--- a/src/smilynx_hw.c
+++ b/src/smilynx_hw.c
@@ -80,9 +80,6 @@ SMILynx_HWInit(ScrnInfoPtr pScrn)
/* Set DPMS state to Off */
mode->SR22 |= 0x30;
- /* VESA compliance power down mode */
- mode->SR24 &= ~0x01;
-
if (pSmi->Chipset != SMI_COUGAR3DR) {
/* Select no displays */
mode->SR31 &= ~0x07;
@@ -127,7 +124,6 @@ SMILynx_HWInit(ScrnInfoPtr pScrn)
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x20, mode->SR20);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, mode->SR21);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x22, mode->SR22);
- VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x24, mode->SR24);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x31, mode->SR31);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, mode->SR32);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x34, mode->SR34);