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authorJesse Barnes <jbarnes@hobbes.lan>2008-04-29 13:19:02 -0700
committerJesse Barnes <jbarnes@hobbes.lan>2008-04-29 13:19:02 -0700
commita0ced923bb793aa22e6bfbeeec0888d3b42ce176 (patch)
tree0d83a319bdd0eda80799dd40e357fe4aa5ef80d6 /src/i830_quirks.c
parentfff17b9d1b58cb53032d153094826dd306836d59 (diff)
Add a new quirk for BIOSes that reprogram regs at lid close/open time
Dell Latitude D500s seem to have this problem. At lid close/open, the DSPABASE reg gets reset to 0, so we either need to keep the framebuffer at offset 0 or make sure we reprogram the CRTCs after the lid opens again. Since we can't make sure the former is always true (buffer resize, etc.), this patch adds a quirk to reset the modes at lid open time. Fixes FDO bug #14890.
Diffstat (limited to 'src/i830_quirks.c')
-rw-r--r--src/i830_quirks.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 24c96587..aaff753d 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -161,6 +161,15 @@ static void i830_dmi_dump(void)
DMIID_DUMP(chassis_asset_tag);
}
+/*
+ * Some machines hose the display regs regardless of the ACPI DOS
+ * setting, so we need to reset modes at ACPI event time.
+ */
+static void quirk_reset_modes (I830Ptr pI830)
+{
+ pI830->quirk_flag |= QUIRK_RESET_MODES;
+}
+
static void quirk_pipea_force (I830Ptr pI830)
{
pI830->quirk_flag |= QUIRK_PIPEA_FORCE;
@@ -278,6 +287,9 @@ static i830_quirk i830_quirk_list[] = {
/* Intel 945GM hardware (See LP: #152416) */
{ PCI_CHIP_I945_GM, 0x1584, 0x9900, quirk_ignore_tv },
+ /* Dell Latitude D500 needs reset modes quirk */
+ { PCI_CHIP_I855_GM, 0x1028, 0x0152, quirk_reset_modes },
+
{ 0, 0, 0, NULL },
};