summaryrefslogtreecommitdiff
path: root/src/i830.h
diff options
context:
space:
mode:
authorShaohua Li <shaohua.li@intel.com>2009-02-23 15:19:25 +0800
committerZhenyu Wang <zhenyu.z.wang@intel.com>2009-04-24 08:54:09 +0800
commit8f64837e56b2de0fb8a9100d1a844fd3f18d751c (patch)
treedb10b653e3ac7223cd5d35b30e9ded01c8135792 /src/i830.h
parent7b01aa5cc41620da5bb48f391ff98d9e82572e52 (diff)
Disable FBC on IGD for UMS
It appears the new chip doesn't support FBC currently. Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Diffstat (limited to 'src/i830.h')
-rw-r--r--src/i830.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/i830.h b/src/i830.h
index 5772f1d2..9b991105 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -955,6 +955,8 @@ static inline int i830_fb_compression_supported(I830Ptr pI830)
return FALSE;
if (IS_I810(pI830) || IS_I815(pI830) || IS_I830(pI830))
return FALSE;
+ if (IS_IGD(pI830))
+ return FALSE;
/* fbc depends on tiled surface. And we don't support tiled
* front buffer with XAA now.
*/