Replace i830WaitSync with just I830Sync(), as nearly all callers had it wrong.

People were trying to BEGIN_BATCH()/ADVANCE_BATCH() then i830WaitSync on the
results, which wouldn't necessarily wait and lead to various painful bugs,
since only EXA called MarkSync and only for certain rendering operations.

6 files changed, 10 insertions, 41 deletions

diff --git a/src/i830.h b/src/i830.h
index d2307f6c..73b0712b 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -440,7 +440,6 @@ typedef struct _I830Rec {
 
    uxa_driver_t *uxa_driver;
    Bool need_flush;
-   Bool need_sync;
    PixmapPtr pSrcPixmap;
    int accel_pixmap_pitch_alignment;
    int accel_pixmap_offset_alignment;
@@ -758,9 +757,6 @@ void i830_hdmi_init(ScrnInfoPtr pScrn, int output_reg);
 /* i830_lvds.c */
 void i830_lvds_init(ScrnInfoPtr pScrn);
 
-extern void i830MarkSync(ScrnInfoPtr pScrn);
-extern void i830WaitSync(ScrnInfoPtr pScrn);
-
 /* i830_memory.c */
 Bool i830_bind_all_memory(ScrnInfoPtr pScrn);
 Bool i830_unbind_all_memory(ScrnInfoPtr pScrn);
diff --git a/src/i830_display.c b/src/i830_display.c
index c8e94ffa..c1617e3a 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1266,8 +1266,10 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
 static Bool
 i830_crtc_lock (xf86CrtcPtr crtc)
 {
-    /* Sync the engine before mode switch */
-    i830WaitSync(crtc->scrn);
+    /* Sync the engine before mode switch, to finish any outstanding
+     * WAIT_FOR_EVENTS that may rely on CRTC state.
+     */
+    I830Sync(crtc->scrn);
 
     return FALSE;
 }
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 626e6584..4fa61c98 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1935,7 +1935,6 @@ i830_refresh_ring(ScrnInfoPtr pScrn)
    pI830->ring.space = pI830->ring.head - (pI830->ring.tail + 8);
    if (pI830->ring.space < 0)
       pI830->ring.space += pI830->ring.mem->size;
-   i830MarkSync(pScrn);
 }
 
 enum pipe {
@@ -3050,7 +3049,7 @@ i830AdjustFrame(int scrnIndex, int x, int y, int flags)
    if (crtc && crtc->enabled)
    {
       /* Sync the engine before adjust frame */
-      i830WaitSync(pScrn);
+      I830Sync(pScrn);
       i830PipeSetBase(crtc, crtc->desiredX + x, crtc->desiredY + y);
       crtc->x = output->initial_x + x;
       crtc->y = output->initial_y + y;
@@ -3454,26 +3453,6 @@ i830_pipe_to_crtc(ScrnInfoPtr pScrn, int pipe)
 } 
 
 void
-i830WaitSync(ScrnInfoPtr pScrn)
-{
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   if (pI830->uxa_driver && pI830->need_sync) {
-      pI830->need_sync = FALSE;
-      I830Sync(pScrn);
-   }
-}
-
-void
-i830MarkSync(ScrnInfoPtr pScrn)
-{
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   if (pI830->uxa_driver)
-      pI830->need_sync = TRUE;
-}
-
-void
 I830InitpScrn(ScrnInfoPtr pScrn)
 {
    pScrn->PreInit = I830PreInit;
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 3ec36571..0a15de83 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -492,11 +492,6 @@ i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
 	I830Ptr i830 = I830PTR(scrn);
 	
 	intel_batch_flush(scrn, FALSE);
-	/* XXX: dri_bo_map should handle syncing for us, what's the deal? */
-	if (i830->need_sync) {
-	    I830Sync(scrn);
-	    i830->need_sync = FALSE;
-	}
 
 	/* No VT sema or GEM?  No GTT mapping. */
 	if (!scrn->vtSema || !i830->memory_manager) {
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 34431466..147fca30 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -1368,10 +1368,7 @@ i830_set_tiling(ScrnInfoPtr pScrn, unsigned int offset,
 
     assert(tile_format != TILE_NONE);
 
-    if (pI830->need_sync) {
-	I830Sync(pScrn);
-	pI830->need_sync = FALSE;
-    }
+    I830Sync(pScrn);
 
     if (IS_I965G(pI830))
 	max_fence = FENCE_NEW_NR;
diff --git a/src/i830_video.c b/src/i830_video.c
index d07fb657..8d33d692 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -461,7 +461,7 @@ i830_overlay_on(ScrnInfoPtr pScrn)
     OUT_BATCH(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
     OUT_BATCH(MI_NOOP);
     ADVANCE_BATCH();
-    i830WaitSync(pScrn);
+    I830Sync(pScrn);
     
     /*
      * If we turned pipe A on up above, turn it
@@ -514,7 +514,7 @@ i830_overlay_off(ScrnInfoPtr pScrn)
 
     /*
      * Wait for overlay to go idle. This has to be
-     * separated from the turning off state by a WaitSync
+     * separated from the turning off state by a Sync
      * to ensure the overlay will not read OCMD early and
      * disable the overlay before the commands here are
      * executed
@@ -524,7 +524,7 @@ i830_overlay_off(ScrnInfoPtr pScrn)
 	OUT_BATCH(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	OUT_BATCH(MI_NOOP);
 	ADVANCE_BATCH();
-	i830WaitSync(pScrn);
+	I830Sync(pScrn);
     }
     
     /*
@@ -545,7 +545,7 @@ i830_overlay_off(ScrnInfoPtr pScrn)
 	OUT_BATCH(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	OUT_BATCH(MI_NOOP);
 	ADVANCE_BATCH();
-	i830WaitSync(pScrn);
+	I830Sync(pScrn);
     }
     pI830->overlayOn = FALSE;
     OVERLAY_DEBUG("overlay_off\n");