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authorChris Wilson <chris@chris-wilson.co.uk>2011-11-30 11:59:31 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2011-11-30 12:08:39 +0000
commit95f4da647a4055545b09cae0834df0fa2127a458 (patch)
tree8282d153a75afe82a8017b0103b3d1d5a246e30b
parentecd6cca617ac29cf2b1b2a4d33fca19b84fea2a9 (diff)
sna: Align pwrite to transfer whole cachelines
Daniel claims that this is will be faster, or will be once he has completed rewriting pwrite! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--src/sna/kgem.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 58b9b67d..959f97ca 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -164,9 +164,16 @@ static int gem_write(int fd, uint32_t handle,
VG_CLEAR(pwrite);
pwrite.handle = handle;
- pwrite.offset = offset;
- pwrite.size = length;
- pwrite.data_ptr = (uintptr_t)src;
+ /* align the transfer to cachelines; fortuitously this is safe! */
+ if ((offset | length) & 63) {
+ pwrite.offset = offset & ~63;
+ pwrite.size = ALIGN(offset+length, 64) - pwrite.offset;
+ pwrite.data_ptr = (uintptr_t)src + pwrite.offset - offset;
+ } else {
+ pwrite.offset = offset;
+ pwrite.size = length;
+ pwrite.data_ptr = (uintptr_t)src;
+ }
return drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite);
}