Merge branch 'master' into xf86-video-intel-2.5-branch

Conflicts:

	configure.ac - resolved version number conflict

19 files changed, 226 insertions, 131 deletions

diff --git a/man/intel.man b/man/intel.man
index e9ae2403..6969a159 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -41,10 +41,13 @@ than has been pre-allocated at boot time by the BIOS.  This is usually
 achieved with an "agpgart" or "agp" kernel driver.  Linux, FreeBSD, OpenBSD,
 NetBSD, and Solaris have such kernel drivers available.
 .PP
-By default, the i810 will use 8 megabytes
-of system memory for graphics.  For the 830M and later, the driver will
-automatically size its memory allocation according to the features it will
-support.  Therefore, the
+By default, the i810/i815 will use 8 MB of system memory for graphics if AGP
+allocable memory is < 128 MB, 16 MB if < 192 MB or 24 MB if higher. Use the
+.B VideoRam
+option to change the default value.
+.PP
+For the 830M and later, the driver will automatically size its memory
+allocation according to the features it will support.  Therefore, the
 .B VideoRam
 option, which in the past had been necessary to allow more than some small
 amount of memory to be allocated, is now ignored.
@@ -109,6 +112,12 @@ Default: 8-bits per RGB for 8-bit modes.
 This option enables XvMC.  The integer parameter specifies the number of
 surfaces to use.  Valid values are 6 and 7.
 Default: XvMC is disabled.
+.TP
+.BI "VideoRam " integer
+This option specifies the amount of system memory to use for graphics, in KB.
+The default is 8192 if AGP allocable memory is < 128 MB, 16384 if < 192 MB,
+24576 if higher. DRI require at least a value of 16384. Higher values may give
+better 3D performance, at expense of available system memory.
 
 .PP
 The following driver
diff --git a/src/Makefile.am b/src/Makefile.am
index 97feea41..8966bd68 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -39,7 +39,7 @@ intel_drv_la_LDFLAGS = -module -avoid-version
 intel_drv_ladir = @moduledir@/drivers
 intel_drv_la_LIBADD = -lm ../uxa/libuxa.la
 if XSERVER_LIBPCIACCESS
-intel_drv_la_LIBADD += @PCIACCESS_LIBS@
+intel_drv_la_LIBADD += @PCIACCESS_LIBS@ @DRM_LIBS@ -ldrm_intel
 endif
 
 XMODE_SRCS=\
diff --git a/src/common.h b/src/common.h
index ece1def0..840d30ab 100644
--- a/src/common.h
+++ b/src/common.h
@@ -323,6 +323,11 @@ extern int I810_DEBUG;
 #define PCI_CHIP_Q45_G_BRIDGE	0x2E10
 #endif
 
+#ifndef PCI_CHIP_G41_G
+#define PCI_CHIP_G41_G		0x2E32
+#define PCI_CHIP_G41_G_BRIDGE	0x2E30
+#endif
+
 #if XSERVER_LIBPCIACCESS
 #define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr
 #define VENDOR_ID(p)      (p)->vendor_id
@@ -355,7 +360,7 @@ extern int I810_DEBUG;
 #define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
 #define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
 #define IS_GM45(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_GM45_GM)
-#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q45_G)
+#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G41_G)
 #define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
 #define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME || IS_GM45(pI810) || IS_G4X(pI810))
 #define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 5154b423..680071a5 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -505,7 +505,7 @@ const char *output_names[] = { "None",
 			       "DVI",
 			       "DVI",
 			       "DVI",
-			       "Composite"
+			       "Composite",
 			       "TV",
 			       "LVDS",
 			       "CTV",
diff --git a/src/drmmode_display.h b/src/drmmode_display.h
index fc7c1df1..ee51c955 100644
--- a/src/drmmode_display.h
+++ b/src/drmmode_display.h
@@ -29,7 +29,7 @@
 
 #ifdef XF86DRM_MODE
 
-#include "dri_bufmgr.h"
+#include "intel_bufmgr.h"
 #include "xf86drmMode.h"
 
 typedef struct {
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 856f5eca..a7f408c4 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -156,6 +156,7 @@ static const struct pci_id_match intel_device_match[] = {
    INTEL_DEVICE_MATCH (PCI_CHIP_IGD_E_G, 0 ),
    INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, 0 ),
    INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, 0 ),
+   INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, 0 ),
     { 0, 0, 0 },
 };
 
@@ -212,6 +213,7 @@ static SymTabRec I810Chipsets[] = {
    {PCI_CHIP_IGD_E_G,		"Intel Integrated Graphics Device"},
    {PCI_CHIP_G45_G,		"G45/G43"},
    {PCI_CHIP_Q45_G,		"Q45/Q43"},
+   {PCI_CHIP_G41_G,		"G41"},
    {-1,				NULL}
 };
 
@@ -245,6 +247,7 @@ static PciChipsets I810PciChipsets[] = {
    {PCI_CHIP_IGD_E_G,		PCI_CHIP_IGD_E_G,	RES_SHARED_VGA},
    {PCI_CHIP_G45_G,		PCI_CHIP_G45_G,		RES_SHARED_VGA},
    {PCI_CHIP_Q45_G,		PCI_CHIP_Q45_G,		RES_SHARED_VGA},
+   {PCI_CHIP_G41_G,		PCI_CHIP_G41_G,		RES_SHARED_VGA},
    {-1,				-1, RES_UNDEFINED }
 };
 
@@ -812,6 +815,7 @@ I810Probe(DriverPtr drv, int flags)
 	    case PCI_CHIP_IGD_E_G:
 	    case PCI_CHIP_G45_G:
 	    case PCI_CHIP_Q45_G:
+	    case PCI_CHIP_G41_G:
     	       xf86SetEntitySharable(usedChips[i]);
 
     	       /* Allocate an entity private if necessary */		
diff --git a/src/i810_reg.h b/src/i810_reg.h
index a73709ba..5b90e12e 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -113,6 +113,20 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define COLEXP_RESERVED        0x30
 #define BITBLT_STATUS          0x01
 
+#define CHDECMISC	0x10111
+#define C0DRB0			0x10200
+#define C0DRB1			0x10202
+#define C0DRB2			0x10204
+#define C0DRB3			0x10206
+#define C0DRA01			0x10208
+#define C0DRA23			0x1020a
+#define C1DRB0			0x10600
+#define C1DRB1			0x10602
+#define C1DRB2			0x10604
+#define C1DRB3			0x10606
+#define C1DRA01			0x10608
+#define C1DRA23			0x1060a
+
 /* p375. 
  */
 #define DISPLAY_CNTL       0x70008
@@ -2824,4 +2838,7 @@ typedef enum {
 
 #define PEG_BAND_GAP_DATA	0x14d68
 
+#define MCHBAR_RENDER_STANDBY	0x111B8
+#define RENDER_STANDBY_ENABLE	(1 << 30)
+
 #endif /* _I810_REG_H */
diff --git a/src/i830.h b/src/i830.h
index 30b0bcff..5fb7e24b 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -79,7 +79,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #endif
 #include "drmmode_display.h"
 #endif
-#include "dri_bufmgr.h"
 #include "intel_bufmgr.h"
 #include "i915_drm.h"
 
@@ -934,7 +933,8 @@ i830_wait_ring_idle(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
 
-   I830WaitLpRing(pScrn, pI830->LpRing->mem->size - 8, 0);
+   if (pI830->accel != ACCEL_NONE)
+       I830WaitLpRing(pScrn, pI830->LpRing->mem->size - 8, 0);
 }
 
 static inline int i830_fb_compression_supported(I830Ptr pI830)
diff --git a/src/i830_batchbuffer.c b/src/i830_batchbuffer.c
index 07ea0825..3727f0ea 100644
--- a/src/i830_batchbuffer.c
+++ b/src/i830_batchbuffer.c
@@ -39,6 +39,65 @@
 #include "i830_ring.h"
 #include "i915_drm.h"
 
+static int
+intel_nondrm_exec(dri_bo *bo, unsigned int used, void *priv)
+{
+    ScrnInfoPtr pScrn = priv;
+    I830Ptr pI830 = I830PTR(pScrn);
+
+    BEGIN_LP_RING(2);
+    OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
+    OUT_RING(bo->offset);
+    ADVANCE_LP_RING();
+
+    return 0;
+}
+
+static int
+intel_nondrm_exec_i830(dri_bo *bo, unsigned int used, void *priv)
+{
+    ScrnInfoPtr pScrn = priv;
+    I830Ptr pI830 = I830PTR(pScrn);
+
+    BEGIN_LP_RING(4);
+    OUT_RING(MI_BATCH_BUFFER);
+    OUT_RING(bo->offset);
+    OUT_RING(bo->offset + pI830->batch_used - 4);
+    OUT_RING(MI_NOOP);
+
+    return 0;
+}
+
+/**
+ * Creates a fence value representing a request to be passed.
+ *
+ * Stub implementation that should be avoided when DRM functions are available.
+ */
+static unsigned int
+intel_nondrm_emit(void *priv)
+{
+    static unsigned int fence = 0;
+
+    /* Match DRM in not using half the range. The fake bufmgr relies on this. */
+    if (++fence >= 0x8000000)
+	fence = 1;
+
+    return fence;
+}
+
+/**
+ * Waits on a fence representing a request to be passed.
+ *
+ * Stub implementation that should be avoided when DRM functions are available.
+ */
+static void
+intel_nondrm_wait(unsigned int fence, void *priv)
+{
+    ScrnInfoPtr pScrn = priv;
+
+    i830_wait_ring_idle(pScrn);
+}
+
 static void
 intel_next_batch(ScrnInfoPtr pScrn)
 {
@@ -64,6 +123,22 @@ intel_batch_init(ScrnInfoPtr pScrn)
     pI830->batch_emitting = 0;
 
     intel_next_batch(pScrn);
+
+    if (!pI830->directRenderingEnabled) {
+	if (IS_I830(pI830) || IS_845G(pI830)) {
+	    intel_bufmgr_fake_set_exec_callback(pI830->bufmgr,
+						intel_nondrm_exec_i830,
+						pScrn);
+	} else {
+	    intel_bufmgr_fake_set_exec_callback(pI830->bufmgr,
+						intel_nondrm_exec,
+						pScrn);
+	}
+	intel_bufmgr_fake_set_fence_callback(pI830->bufmgr,
+					     intel_nondrm_emit,
+					     intel_nondrm_wait,
+					     pScrn);
+    }
 }
 
 void
@@ -81,6 +156,7 @@ void
 intel_batch_flush(ScrnInfoPtr pScrn)
 {
     I830Ptr pI830 = I830PTR(pScrn);
+    int ret;
 
     if (pI830->batch_used == 0)
 	return;
@@ -98,63 +174,9 @@ intel_batch_flush(ScrnInfoPtr pScrn)
     dri_bo_unmap(pI830->batch_bo);
     pI830->batch_ptr = NULL;
 
-    if (pI830->memory_manager) {
-	struct drm_i915_gem_execbuffer *exec;
-	int ret;
-
-	exec = dri_process_relocs(pI830->batch_bo);
-
-	exec->batch_start_offset = 0;
-	exec->batch_len = pI830->batch_used;
-	exec->cliprects_ptr = 0;
-	exec->num_cliprects = 0;
-	exec->DR1 = 0;
-	exec->DR4 = 0xffffffff;
-
-	do {
-	    ret = drmCommandWriteRead(pI830->drmSubFD, DRM_I915_GEM_EXECBUFFER,
-				      exec, sizeof(*exec));
-	} while (ret == -EINTR);
-	if (ret != 0)
-	    FatalError("Failed to submit batchbuffer: %s\n", strerror(errno));
-    } else {
-	dri_process_relocs(pI830->batch_bo);
-
-	if (pI830->directRenderingEnabled) {
-	    struct drm_i915_batchbuffer batch;
-	    int ret;
-
-	    batch.start = pI830->batch_bo->offset;
-	    batch.used = pI830->batch_used;
-	    batch.cliprects = NULL;
-	    batch.num_cliprects = 0;
-	    batch.DR1 = 0;
-	    batch.DR4 = 0xffffffff;
-
-	    ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_BATCHBUFFER,
-				  &batch, sizeof(batch));
-	    if (ret != 0)
-		FatalError("Failed to submit batchbuffer: %s\n", strerror(errno));
-
-	    i830_refresh_ring(pScrn);
-	} else {
-	    if (!IS_I830(pI830) && !IS_845G(pI830)) {
-		BEGIN_LP_RING(2);
-		OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
-		OUT_RING(pI830->batch_bo->offset);
-		ADVANCE_LP_RING();
-	    } else {
-		BEGIN_LP_RING(4);
-		OUT_RING(MI_BATCH_BUFFER);
-		OUT_RING(pI830->batch_bo->offset);
-		OUT_RING(pI830->batch_bo->offset + pI830->batch_used - 4);
-		OUT_RING(MI_NOOP);
-		ADVANCE_LP_RING();
-	    }
-	}
-    }
-
-    dri_post_submit(pI830->batch_bo);
+    ret = dri_bo_exec(pI830->batch_bo, pI830->batch_used, NULL, 0, 0xffffffff);
+    if (ret != 0)
+	FatalError("Failed to submit batchbuffer: %s\n", strerror(-ret));
 
     dri_bo_unreference(pI830->batch_bo);
     intel_next_batch(pScrn);
diff --git a/src/i830_batchbuffer.h b/src/i830_batchbuffer.h
index 2a23cae3..3c7a69be 100644
--- a/src/i830_batchbuffer.h
+++ b/src/i830_batchbuffer.h
@@ -68,8 +68,8 @@ intel_batch_emit_reloc (I830Ptr  pI830,
 {
     assert(intel_batch_space(pI830) >= 4);
     *(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = bo->offset + delta;
-    intel_bo_emit_reloc (pI830->batch_bo, read_domains, write_domains, delta,
-			 pI830->batch_used, bo);
+    dri_bo_emit_reloc(pI830->batch_bo, read_domains, write_domains, delta,
+		      pI830->batch_used, bo);
     pI830->batch_used += 4;
 }
 
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 21afb466..17ee40fa 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -48,6 +48,32 @@
 #define DEBUGSTRING(func) static char *func(I830Ptr pI830, int reg, \
 					    uint32_t val)
 
+DEBUGSTRING(i830_16bit_func)
+{
+    return XNFprintf("0x%04x", (uint16_t)val);
+}
+
+DEBUGSTRING(i830_debug_chdecmisc)
+{
+    char *enhmodesel = NULL;
+
+    switch ((val >> 5) & 3) {
+    case 1: enhmodesel = "XOR bank/rank"; break;
+    case 2: enhmodesel = "swap bank"; break;
+    case 3: enhmodesel = "XOR bank"; break;
+    case 0: enhmodesel = "none"; break;
+    }
+
+    return XNFprintf("%s, ch2 enh %sabled, ch1 enh %sabled, ch0 enh %sabled, "
+		     "flex %sabled, ep %spresent",
+		     enhmodesel,
+		     (val & (1 << 4)) ? "en" : "dis",
+		     (val & (1 << 3)) ? "en" : "dis",
+		     (val & (1 << 2)) ? "en" : "dis",
+		     (val & (1 << 1)) ? "en" : "dis",
+		     (val & (1 << 0)) ? "" : "not ");
+}
+
 DEBUGSTRING(i830_debug_xyminus1)
 {
     return XNFprintf("%d, %d", (val & 0xffff) + 1,
@@ -481,6 +507,8 @@ DEBUGSTRING(i810_debug_fence_new)
 
 #define DEFINEREG(reg) \
 	{ reg, #reg, NULL, 0 }
+#define DEFINEREG_16BIT(reg) \
+	{ reg, #reg, i830_16bit_func, 0 }
 #define DEFINEREG2(reg, func) \
 	{ reg, #reg, func, 0 }
 
@@ -490,6 +518,20 @@ static struct i830SnapshotRec {
     char *(*debug_output)(I830Ptr pI830, int reg, uint32_t val);
     uint32_t val;
 } i830_snapshot[] = {
+    DEFINEREG2(CHDECMISC, i830_debug_chdecmisc),
+    DEFINEREG_16BIT(C0DRB0),
+    DEFINEREG_16BIT(C0DRB1),
+    DEFINEREG_16BIT(C0DRB2),
+    DEFINEREG_16BIT(C0DRB3),
+    DEFINEREG_16BIT(C1DRB0),
+    DEFINEREG_16BIT(C1DRB1),
+    DEFINEREG_16BIT(C1DRB2),
+    DEFINEREG_16BIT(C1DRB3),
+    DEFINEREG_16BIT(C0DRA01),
+    DEFINEREG_16BIT(C0DRA23),
+    DEFINEREG_16BIT(C1DRA01),
+    DEFINEREG_16BIT(C1DRA23),
+
     DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
     DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp),
     DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd),
diff --git a/src/i830_display.c b/src/i830_display.c
index f81847b5..ed49fb0e 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -753,6 +753,9 @@ static void i830_modeset_ctl(xf86CrtcPtr crtc, int pre)
     I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
     struct drm_modeset_ctl modeset;
 
+    if (!pI830->directRenderingEnabled)
+      return;
+
     modeset.crtc = intel_crtc->plane;
 
     /*
diff --git a/src/i830_dri.c b/src/i830_dri.c
index ca3bc621..fb9b6f63 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -834,6 +834,11 @@ I830DRIDoMappings(ScreenPtr pScreen)
       return FALSE;
    }
 
+   if (pI830->memory_manager == NULL)
+       intel_bufmgr_fake_set_last_dispatch(pI830->bufmgr,
+					   (volatile unsigned int *)
+					   &sarea->last_dispatch);
+
    /* init to zero to be safe */
    sarea->front_handle = 0;
    sarea->back_handle = 0;
@@ -1542,7 +1547,7 @@ i830_name_buffer (ScrnInfoPtr pScrn, i830_memory *mem)
 	if (!mem->gem_name)
 	{
 	    int ret;
-	    ret = intel_bo_flink(mem->bo, &mem->gem_name);
+	    ret = dri_bo_flink(mem->bo, &mem->gem_name);
 	    if (ret != 0)
 	    {
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 2ce8942c..e48e20ec 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -254,6 +254,7 @@ static SymTabRec I830Chipsets[] = {
    {PCI_CHIP_IGD_E_G,		"Intel Integrated Graphics Device"},
    {PCI_CHIP_G45_G,		"G45/G43"},
    {PCI_CHIP_Q45_G,		"Q45/Q43"},
+   {PCI_CHIP_G41_G,		"G41"},
    {-1,				NULL}
 };
 
@@ -281,6 +282,7 @@ static PciChipsets I830PciChipsets[] = {
    {PCI_CHIP_IGD_E_G,		PCI_CHIP_IGD_E_G,	RES_SHARED_VGA},
    {PCI_CHIP_G45_G,		PCI_CHIP_G45_G,		RES_SHARED_VGA},
    {PCI_CHIP_Q45_G,		PCI_CHIP_Q45_G,		RES_SHARED_VGA},
+   {PCI_CHIP_G41_G,		PCI_CHIP_G41_G,		RES_SHARED_VGA},
    {-1,				-1,			RES_UNDEFINED}
 };
 
@@ -1267,6 +1269,9 @@ i830_detect_chipset(ScrnInfoPtr pScrn)
     case PCI_CHIP_Q45_G:
 	chipname = "Q45/Q43";
 	break;
+    case PCI_CHIP_G41_G:
+	chipname = "G41";
+	break;
    default:
 	chipname = "unknown chipset";
 	break;
@@ -2886,39 +2891,6 @@ i830_memory_init(ScrnInfoPtr pScrn)
     return FALSE;
 }
 
-/**
- * Returns a cookie to be waited on.  This is just a stub implementation, and
- * should be hooked up to the emit/wait irq functions when available (DRI
- * enabled).
- */
-static unsigned int
-i830_fake_fence_emit(void *priv)
-{
-   static unsigned int fence = 0;
-
-   /* Match DRM in not using half the range. The fake bufmgr relies on this. */
-   if (++fence >= 0x8000000)
-      fence = 1;
-
-   return fence;
-}
-
-/**
- * Waits on a cookie representing a request to be passed.
- *
- * Stub implementation that should be replaced with DRM functions when
- * available.
- */
-static int
-i830_fake_fence_wait(void *priv, unsigned int fence)
-{
-   ScrnInfoPtr pScrn = priv;
-
-   i830_wait_ring_idle(pScrn);
-
-   return 0;
-}
-
 void
 i830_init_bufmgr(ScrnInfoPtr pScrn)
 {
@@ -2940,13 +2912,12 @@ i830_init_bufmgr(ScrnInfoPtr pScrn)
       intel_bufmgr_gem_enable_reuse(pI830->bufmgr);
    } else {
       assert(pI830->FbBase != NULL);
-      pI830->bufmgr = intel_bufmgr_fake_init(pI830->fake_bufmgr_mem->offset,
+      pI830->bufmgr = intel_bufmgr_fake_init(pI830->drmSubFD,
+					     pI830->fake_bufmgr_mem->offset,
 					     pI830->FbBase +
 					     pI830->fake_bufmgr_mem->offset,
 					     pI830->fake_bufmgr_mem->size,
-					     i830_fake_fence_emit,
-					     i830_fake_fence_wait,
-					     pScrn);
+					     NULL);
    }
 }
 
@@ -3046,6 +3017,23 @@ I830SwapPipes(ScrnInfoPtr pScrn)
    }
 }
 
+static void
+i830_disable_render_standby(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   uint32_t render_standby;
+
+   /* Render Standby might cause hang issue, try always disable it.*/
+   if (IS_I965GM(pI830) || IS_GM45(pI830)) {
+       render_standby = INREG(MCHBAR_RENDER_STANDBY);
+       if (render_standby & RENDER_STANDBY_ENABLE) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disable render standby.\n");
+	   OUTREG(MCHBAR_RENDER_STANDBY,
+		   (render_standby & (~RENDER_STANDBY_ENABLE)));
+       }
+   }
+}
+
 static Bool
 I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 {
@@ -3325,6 +3313,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
    i830_init_bufmgr(pScrn);
 
+   i830_disable_render_standby(pScrn);
+
    DPRINTF(PFX, "assert( if(!I830EnterVT(scrnIndex, 0)) )\n");
 
    if (pI830->accel <= ACCEL_XAA) {
@@ -3528,7 +3518,7 @@ I830LeaveVT(int scrnIndex, int flags)
    pI830->leaving = TRUE;
 
    if (pI830->devicesTimer)
-      TimerCancel(pI830->devicesTimer);
+      TimerFree(pI830->devicesTimer);
    pI830->devicesTimer = NULL;
 
    i830SetHotkeyControl(pScrn, HOTKEY_BIOS_SWITCH);
@@ -3702,8 +3692,8 @@ I830EnterVT(int scrnIndex, int flags)
        /* HW status is fixed, we need to set it up before any drm
 	* operation which accessing that page, like irq install, etc.
 	*/
-       if (pI830->starting) {
-	   if (pI830->hw_status != NULL && !I830DRISetHWS(pScrn)) {
+       if (pI830->starting && !pI830->memory_manager) {
+	   if (!I830DRISetHWS(pScrn)) {
 		   xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 			   "Fail to setup hardware status page.\n");
 		   I830DRICloseScreen(pScrn->pScreen);
@@ -3786,11 +3776,8 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
       I830LeaveVT(scrnIndex, 0);
    }
 
-   dri_bufmgr_destroy(pI830->bufmgr);
-   pI830->bufmgr = NULL;
-
    if (pI830->devicesTimer)
-      TimerCancel(pI830->devicesTimer);
+      TimerFree(pI830->devicesTimer);
    pI830->devicesTimer = NULL;
 
    if (!pI830->use_drm_mode) {
@@ -3828,6 +3815,10 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
    xf86_cursors_fini (pScreen);
 
    i830_allocator_fini(pScrn);
+
+   dri_bufmgr_destroy(pI830->bufmgr);
+   pI830->bufmgr = NULL;
+
 #ifdef XF86DRI
    if (pI830->directRenderingOpen) {
 #ifdef DAMAGE
@@ -3935,7 +3926,7 @@ I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
       /* If we had status checking turned on, turn it off now */
       if (pI830->checkDevices) {
          if (pI830->devicesTimer)
-            TimerCancel(pI830->devicesTimer);
+            TimerFree(pI830->devicesTimer);
          pI830->devicesTimer = NULL;
          pI830->checkDevices = FALSE; 
       }
diff --git a/src/i830_exa.c b/src/i830_exa.c
index e73bc36a..fd29df11 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -465,8 +465,6 @@ i830_transform_is_affine (PictTransformPtr t)
     return t->matrix[2][0] == 0 && t->matrix[2][1] == 0;
 }
 
-static DevPrivateKey exa_pixmap_key = &exa_pixmap_key;
-
 #ifdef XF86DRM_MODE
 
 static void *
@@ -618,9 +616,6 @@ I830EXAInit(ScreenPtr pScreen)
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     I830Ptr pI830 = I830PTR(pScrn);
 
-    if (!dixRequestPrivate(exa_pixmap_key, 0))
-	return FALSE;
-
     pI830->EXADriverPtr = exaDriverAlloc();
     if (pI830->EXADriverPtr == NULL) {
 	pI830->accel = ACCEL_NONE;
@@ -731,12 +726,12 @@ I830EXAInit(ScreenPtr pScreen)
     return TRUE;
 }
 
-static DevPrivateKey	uxa_pixmap_key = &uxa_pixmap_key;
+static int uxa_pixmap_index;
 
 static void
 i830_uxa_set_pixmap_bo (PixmapPtr pixmap, dri_bo *bo)
 {
-    dixSetPrivate(&pixmap->devPrivates, uxa_pixmap_key, bo);
+    dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, bo);
 }
 
 dri_bo *
@@ -747,7 +742,7 @@ i830_get_pixmap_bo(PixmapPtr pixmap)
     I830Ptr i830 = I830PTR(scrn);
 
     if (i830->accel == ACCEL_UXA) {
-	return dixLookupPrivate(&pixmap->devPrivates, uxa_pixmap_key);
+	return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
     } else if (i830->accel == ACCEL_EXA) {
 	struct i830_exa_pixmap_priv *driver_priv =
 	    exaGetPixmapDriverPrivate(pixmap);
@@ -879,7 +874,7 @@ i830_uxa_init (ScreenPtr pScreen)
     ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
     I830Ptr i830 = I830PTR(scrn);
 
-    if (!dixRequestPrivate(uxa_pixmap_key, 0))
+    if (!dixRequestPrivate(&uxa_pixmap_index, 0))
 	return FALSE;
     
     i830->uxa_driver = uxa_driver_alloc();
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 443cc4e5..2cbdd17a 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -167,7 +167,7 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
 
 #ifdef XF86DRI
     if (mem->bo != NULL) {
-	if (intel_bo_pin (mem->bo, mem->alignment) != 0) {
+	if (dri_bo_pin(mem->bo, mem->alignment) != 0) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		       "Failed to pin %s: %s\n",
 		       mem->name, strerror(errno));
@@ -214,7 +214,7 @@ i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
 
 #ifdef XF86DRI
     if (mem->bo != NULL) {
-	if (intel_bo_unpin (mem->bo) == 0) {
+	if (dri_bo_unpin(mem->bo) == 0) {
 	    mem->bound = FALSE;
 	    /* Give buffer obviously wrong offset/end until it's re-pinned. */
 	    mem->offset = -1;
@@ -897,7 +897,7 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
 	else
 	    tiling_mode = I915_TILING_Y;
 
-	ret = intel_bo_set_tiling (mem->bo, &tiling_mode);
+	ret = dri_bo_set_tiling(mem->bo, &tiling_mode);
 	if (ret != 0 || tiling_mode == I915_TILING_NONE) {
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 			   "Failed to set tiling on %s: %s\n",
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 038676e0..089e458f 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -293,6 +293,8 @@ static i830_quirk i830_quirk_list[] = {
     { PCI_CHIP_I855_GM, 0x1028, 0x014f, quirk_pipea_force },
     /* Dell Inspiron 510m needs pipe A force quirk */
     { PCI_CHIP_I855_GM, 0x1028, 0x0164, quirk_pipea_force },
+    /* Toshiba Satellite A30 needs pipe A force quirk */
+    { PCI_CHIP_I855_GM, 0x1179, 0xff00 , quirk_pipea_force },
     /* Toshiba Protege R-205, S-209 needs pipe A force quirk */
     { PCI_CHIP_I915_GM, 0x1179, 0x0001, quirk_pipea_force },
     /* Intel 855GM hardware (See LP: #216490) */
diff --git a/uxa/uxa-priv.h b/uxa/uxa-priv.h
index c50ab3af..13535876 100644
--- a/uxa/uxa-priv.h
+++ b/uxa/uxa-priv.h
@@ -155,8 +155,8 @@ typedef struct {
     (PixmapWidthPaddingInfo[d].padRoundUp+1)))
 #endif
 
-extern DevPrivateKey uxa_screen_key;
-#define uxa_get_screen(s) ((uxa_screen_t *)dixLookupPrivate(&(s)->devPrivates, uxa_screen_key))
+extern int uxa_screen_index;
+#define uxa_get_screen(s) ((uxa_screen_t *)dixLookupPrivate(&(s)->devPrivates, &uxa_screen_index))
 
 /** Align an offset to an arbitrary alignment */
 #define UXA_ALIGN(offset, align) (((offset) + (align) - 1) - \
diff --git a/uxa/uxa.c b/uxa/uxa.c
index aac3d686..8658406a 100644
--- a/uxa/uxa.c
+++ b/uxa/uxa.c
@@ -39,7 +39,7 @@
 #include "dixfontstr.h"
 #include "uxa.h"
 
-DevPrivateKey uxa_screen_key = &uxa_screen_key;
+int uxa_screen_index;
 
 /**
  * uxa_get_drawable_pixmap() returns a backing pixmap for a given drawable.
@@ -422,7 +422,7 @@ uxa_driver_init(ScreenPtr screen, uxa_driver_t *uxa_driver)
 
     uxa_screen->info = uxa_driver;
 
-    dixSetPrivate(&screen->devPrivates, uxa_screen_key, uxa_screen);
+    dixSetPrivate(&screen->devPrivates, &uxa_screen_index, uxa_screen);
 
 //    exaDDXDriverInit(screen);