diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-07-09 12:12:13 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-07-09 12:12:13 +0100 |
| commit | 6fba8c449f61341a98a5ae8d97effa6fd0610fd4 (patch) | |
| tree | aa2c5c15251f6f304f49367a528d41fa7f4a75d9 | |
| parent | 141e88c8730a099a6ca5eab1350c2e53a680cb0d (diff) | |
Add support for I854.
I spotted that the kernel knew of the I854, but the pci-id was never
added to the ddx.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| -rw-r--r-- | src/intel_driver.h | 10 | ||||
| -rw-r--r-- | src/intel_memory.c | 2 | ||||
| -rw-r--r-- | src/intel_module.c | 6 |
3 files changed, 16 insertions, 2 deletions
diff --git a/src/intel_driver.h b/src/intel_driver.h index 3e4a79da..c0b1c579 100644 --- a/src/intel_driver.h +++ b/src/intel_driver.h @@ -30,6 +30,11 @@ #define PCI_CHIP_845_G_BRIDGE 0x2560 #endif +#ifndef PCI_CHIP_I854 +#define PCI_CHIP_I854 0x358E +#define PCI_CHIP_I854_BRIDGE 0x358C +#endif + #ifndef PCI_CHIP_I855_GM #define PCI_CHIP_I855_GM 0x3582 #define PCI_CHIP_I855_GM_BRIDGE 0x3580 @@ -191,10 +196,13 @@ #define IS_I815(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I815) #define IS_I830(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I830_M) #define IS_845G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_845_G) -#define IS_I85X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM) +#define IS_I85X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I854) #define IS_I852(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME)) +#define IS_I854(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I854) #define IS_I855(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME)) #define IS_I865G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I865_G) +#define IS_I8XX(pI810) (IS_I830(pI810) || IS_845G(pI810) || IS_I85X(pI810) || IS_I865G(pI810)) #define IS_I915G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_E7221_G) #define IS_I915GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_GM) diff --git a/src/intel_memory.c b/src/intel_memory.c index 8443c919..47444ebe 100644 --- a/src/intel_memory.c +++ b/src/intel_memory.c @@ -144,7 +144,7 @@ intel_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling) /* 8xx spec has always 8K limit, but tests show larger limit in non-tiling mode, which makes large monitor work. */ - if ((IS_845G(intel) || IS_I85X(intel)) && tiling) + if (IS_I8XX(intel) && tiling) limit = KB(8); if (IS_I915(intel) && tiling) diff --git a/src/intel_module.c b/src/intel_module.c index 42350d43..5e649894 100644 --- a/src/intel_module.c +++ b/src/intel_module.c @@ -44,6 +44,7 @@ static const SymTabRec _intel_chipsets[] = { {PCI_CHIP_I815, "i815"}, {PCI_CHIP_I830_M, "i830M"}, {PCI_CHIP_845_G, "845G"}, + {PCI_CHIP_I854, "854"}, {PCI_CHIP_I855_GM, "852GM/855GM"}, {PCI_CHIP_I865_G, "865G"}, {PCI_CHIP_I915_G, "915G"}, @@ -85,6 +86,7 @@ static const struct pci_id_match intel_device_match[] = { INTEL_DEVICE_MATCH (PCI_CHIP_I815, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_845_G, 0 ), + INTEL_DEVICE_MATCH (PCI_CHIP_I854, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, 0 ), @@ -124,6 +126,7 @@ static PciChipsets intel_pci_chipsets[] = { {PCI_CHIP_I815, PCI_CHIP_I815, NULL}, {PCI_CHIP_I830_M, PCI_CHIP_I830_M, NULL}, {PCI_CHIP_845_G, PCI_CHIP_845_G, NULL}, + {PCI_CHIP_I854, PCI_CHIP_I854, NULL}, {PCI_CHIP_I855_GM, PCI_CHIP_I855_GM, NULL}, {PCI_CHIP_I865_G, PCI_CHIP_I865_G, NULL}, {PCI_CHIP_I915_G, PCI_CHIP_I915_G, NULL}, @@ -179,6 +182,9 @@ void intel_detect_chipset(ScrnInfoPtr scrn, case PCI_CHIP_845_G: chipset->name = "845G"; break; + case PCI_CHIP_I854: + chipset->name = "854"; + break; case PCI_CHIP_I855_GM: /* Check capid register to find the chipset variant */ pci_device_cfg_read_u32(pci, &capid, I85X_CAPID); |