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authorChad Versace <chad@chad-versace.us>2011-07-18 00:38:00 -0700
committerChad Versace <chad@chad-versace.us>2011-07-19 13:08:18 -0700
commit3e55f3e88b40471706d5cd45c4df4010f8675c75 (patch)
tree08fc6b24a97fbe5f12f264d0a71eac305871ee33
parent212fa9868767637e8f430485eeb522c99e63fd16 (diff)
dri: Do not tile stencil buffer
Until now, the stencil buffer was allocated as a Y tiled buffer, because in several locations the PRM states that it is. However, it is actually W tiled. From the PRM, 2011 Sandy Bridge, Volume 1, Part 2, Section 4.5.2.1 W-Major Format: W-Major Tile Format is used for separate stencil. The GTT is incapable of W fencing, so we allocate the stencil buffer with I915_TILING_NONE and decode the tile's layout in software. This commit mutually depends on the mesa commit: intel: Fix stencil buffer to be W tiled Author: Chad Versace <chad@chad-versace.us> Date: Mon Jul 18 00:37:45 2011 -0700 Signed-off-by: Chad Versace <chad@chad-versace.us> Reviewed-by: Ian Romanick <ian.romanick@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r--src/intel_dri.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/src/intel_dri.c b/src/intel_dri.c
index 5ea7c2ca..90f9b8fe 100644
--- a/src/intel_dri.c
+++ b/src/intel_dri.c
@@ -336,7 +336,6 @@ I830DRI2CreateBuffer(DrawablePtr drawable, unsigned int attachment,
switch (attachment) {
case DRI2BufferDepth:
case DRI2BufferDepthStencil:
- case DRI2BufferStencil:
case DRI2BufferHiz:
if (SUPPORTS_YTILING(intel)) {
hint |= INTEL_CREATE_PIXMAP_TILING_Y;
@@ -351,6 +350,14 @@ I830DRI2CreateBuffer(DrawablePtr drawable, unsigned int attachment,
case DRI2BufferFrontRight:
hint |= INTEL_CREATE_PIXMAP_TILING_X;
break;
+ case DRI2BufferStencil:
+ /*
+ * The stencil buffer is W tiled. However, we
+ * request from the kernel a non-tiled buffer
+ * because the GTT is incapable of W fencing.
+ */
+ hint |= INTEL_CREATE_PIXMAP_TILING_NONE;
+ break;
default:
free(privates);
free(buffer);
@@ -368,11 +375,12 @@ I830DRI2CreateBuffer(DrawablePtr drawable, unsigned int attachment,
* To accomplish this, we resort to the nasty hack of doubling
* the drm region's cpp and halving its height.
*
- * If we neglect to double the pitch, then
- * drm_intel_gem_bo_map_gtt() maps the memory incorrectly.
+ * If we neglect to double the pitch, then render corruption
+ * occurs.
*/
if (attachment == DRI2BufferStencil) {
- pixmap_height /= 2;
+ pixmap_width = ALIGN(pixmap_width, 64);
+ pixmap_height = ALIGN((pixmap_height + 1) / 2, 64);
pixmap_cpp *= 2;
}