Share several render fields between render implementations.

Also, start settling on the cairo naming for things: source, mask, and dest.

4 files changed, 43 insertions, 51 deletions

diff --git a/src/i830.h b/src/i830.h
index 05f12d10..a505cb54 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -265,11 +265,12 @@ typedef struct intel_screen_private {
 	float src_coord_adjust;
 	float mask_coord_adjust;
 
-	/* i830 render accel state */
-	PixmapPtr render_src, render_mask, render_dst;
-	PicturePtr render_src_picture, render_mask_picture, render_dst_picture;
-	uint32_t render_dst_format;
+	PixmapPtr render_source, render_mask, render_dest;
+	PicturePtr render_source_picture, render_mask_picture, render_dest_picture;
 	Bool needs_render_state_emit;
+
+	/* i830 render accel state */
+	uint32_t render_dest_format;
 	uint32_t cblend, ablend, s8_blendctl;
 
 	/* i915 render accel state */
@@ -279,7 +280,6 @@ typedef struct intel_screen_private {
 	struct {
 		int op;
 		uint32_t dst_format;
-		Bool needs_emit;
 	} i915_render_state;
 
 	/* 965 render acceleration state */
diff --git a/src/i830_render.c b/src/i830_render.c
index c4b264d2..d463b536 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -411,19 +411,19 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
 	ScrnInfoPtr scrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
-	intel->render_src_picture = pSrcPicture;
-	intel->render_src = pSrc;
+	intel->render_source_picture = pSrcPicture;
+	intel->render_source = pSrc;
 	intel->render_mask_picture = pMaskPicture;
 	intel->render_mask = pMask;
-	intel->render_dst_picture = pDstPicture;
-	intel->render_dst = pDst;
+	intel->render_dest_picture = pDstPicture;
+	intel->render_dest = pDst;
 
 	i830_exa_check_pitch_3d(pSrc);
 	if (pMask)
 		i830_exa_check_pitch_3d(pMask);
 	i830_exa_check_pitch_3d(pDst);
 
-	if (!i830_get_dest_format(pDstPicture, &intel->render_dst_format))
+	if (!i830_get_dest_format(pDstPicture, &intel->render_dest_format))
 		return FALSE;
 
 	intel->dst_coord_adjust = 0;
@@ -549,18 +549,18 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
 
 	OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 	OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
-		  BUF_3D_PITCH(intel_get_pixmap_pitch(intel->render_dst)));
-	OUT_RELOC_PIXMAP(intel->render_dst,
+		  BUF_3D_PITCH(intel_get_pixmap_pitch(intel->render_dest)));
+	OUT_RELOC_PIXMAP(intel->render_dest,
 			 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 
 	OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
-	OUT_BATCH(intel->render_dst_format);
+	OUT_BATCH(intel->render_dest_format);
 
 	OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
 	OUT_BATCH(0);
 	OUT_BATCH(0);		/* ymin, xmin */
-	OUT_BATCH(DRAW_YMAX(intel->render_dst->drawable.height - 1) |
-		  DRAW_XMAX(intel->render_dst->drawable.width - 1));
+	OUT_BATCH(DRAW_YMAX(intel->render_dest->drawable.height - 1) |
+		  DRAW_XMAX(intel->render_dest->drawable.width - 1));
 	OUT_BATCH(0);		/* yorig, xorig */
 
 	OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
@@ -590,7 +590,7 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
 		  DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
 		  DISABLE_DITHER | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE);
 
-	if (i830_transform_is_affine(intel->render_src_picture->transform))
+	if (i830_transform_is_affine(intel->render_source_picture->transform))
 		texcoordfmt |= (TEXCOORDFMT_2D << 0);
 	else
 		texcoordfmt |= (TEXCOORDFMT_3D << 0);
@@ -605,7 +605,7 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
 
 	ADVANCE_BATCH();
 
-	i830_texture_setup(intel->render_src_picture, intel->render_src, 0);
+	i830_texture_setup(intel->render_source_picture, intel->render_source, 0);
 	if (intel->render_mask) {
 		i830_texture_setup(intel->render_mask_picture,
 				   intel->render_mask, 1);
diff --git a/src/i915_render.c b/src/i915_render.c
index 2616481a..3382b64d 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -329,12 +329,12 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
 		i830_get_pixmap_bo(pDst),
 	};
 
-	intel->render_src_picture = pSrcPicture;
-	intel->render_src = pSrc;
+	intel->render_source_picture = pSrcPicture;
+	intel->render_source = pSrc;
 	intel->render_mask_picture = pMaskPicture;
 	intel->render_mask = pMask;
-	intel->render_dst_picture = pDstPicture;
-	intel->render_dst = pDst;
+	intel->render_dest_picture = pDstPicture;
+	intel->render_dest = pDst;
 
 	i830_exa_check_pitch_3d(pSrc);
 	if (pMask)
@@ -369,7 +369,7 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
 	}
 
 	intel->i915_render_state.op = op;
-	intel->i915_render_state.needs_emit = TRUE;
+	intel->needs_render_state_emit = TRUE;
 
 	return TRUE;
 }
@@ -378,19 +378,19 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	int op = intel->i915_render_state.op;
-	PicturePtr pSrcPicture = intel->render_src_picture;
+	PicturePtr pSrcPicture = intel->render_source_picture;
 	PicturePtr pMaskPicture = intel->render_mask_picture;
-	PicturePtr pDstPicture = intel->render_dst_picture;
-	PixmapPtr pSrc = intel->render_src;
+	PicturePtr pDstPicture = intel->render_dest_picture;
+	PixmapPtr pSrc = intel->render_source;
 	PixmapPtr pMask = intel->render_mask;
-	PixmapPtr pDst = intel->render_dst;
+	PixmapPtr pDst = intel->render_dest;
 	uint32_t dst_format = intel->i915_render_state.dst_format, dst_pitch;
 	uint32_t blendctl;
 	int out_reg = FS_OC;
 	FS_LOCALS(20);
 	Bool is_affine_src, is_affine_mask;
 
-	intel->i915_render_state.needs_emit = FALSE;
+	intel->needs_render_state_emit = FALSE;
 
 	IntelEmitInvarientState(scrn);
 	intel->last_3d = LAST_3D_RENDER;
@@ -760,7 +760,7 @@ i915_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 
 	intel_batch_start_atomic(scrn, 150);
 
-	if (intel->i915_render_state.needs_emit)
+	if (intel->needs_render_state_emit)
 		i915_emit_composite_setup(scrn);
 
 	i915_emit_composite_primitive(pDst, srcX, srcY, maskX, maskY, dstX,
@@ -773,5 +773,5 @@ void i915_batch_flush_notify(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
-	intel->i915_render_state.needs_emit = TRUE;
+	intel->needs_render_state_emit = TRUE;
 }
diff --git a/src/i965_render.c b/src/i965_render.c
index 17ae558f..b253dc94 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -581,12 +581,6 @@ typedef float gen4_vertex_buffer[VERTEX_BUFFER_SIZE];
 
 typedef struct gen4_composite_op {
 	int op;
-	PicturePtr source_picture;
-	PicturePtr mask_picture;
-	PicturePtr dest_picture;
-	PixmapPtr source;
-	PixmapPtr mask;
-	PixmapPtr dest;
 	drm_intel_bo *binding_table_bo;
 	sampler_state_filter_t src_filter;
 	sampler_state_filter_t mask_filter;
@@ -616,8 +610,6 @@ struct gen4_render_state {
 
 	int vb_offset;
 	int vertex_size;
-
-	Bool needs_state_emit;
 };
 
 /**
@@ -1100,10 +1092,10 @@ static void i965_emit_composite_state(ScrnInfoPtr scrn)
 	struct gen4_render_state *render_state = intel->gen4_render_state;
 	gen4_composite_op *composite_op = &render_state->composite_op;
 	int op = composite_op->op;
-	PicturePtr pMaskPicture = composite_op->mask_picture;
-	PicturePtr pDstPicture = composite_op->dest_picture;
-	PixmapPtr pMask = composite_op->mask;
-	PixmapPtr pDst = composite_op->dest;
+	PicturePtr pMaskPicture = intel->render_mask_picture;
+	PicturePtr pDstPicture = intel->render_dest_picture;
+	PixmapPtr pMask = intel->render_mask;
+	PixmapPtr pDst = intel->render_dest;
 	sampler_state_filter_t src_filter = composite_op->src_filter;
 	sampler_state_filter_t mask_filter = composite_op->mask_filter;
 	sampler_state_extend_t src_extend = composite_op->src_extend;
@@ -1117,7 +1109,7 @@ static void i965_emit_composite_state(ScrnInfoPtr scrn)
 	uint32_t src_blend, dst_blend;
 	dri_bo *binding_table_bo = composite_op->binding_table_bo;
 
-	render_state->needs_state_emit = FALSE;
+	intel->needs_render_state_emit = FALSE;
 
 	IntelEmitInvarientState(scrn);
 	intel->last_3d = LAST_3D_RENDER;
@@ -1533,12 +1525,12 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 	drm_intel_bo_unreference(surface_state_bo);
 
 	composite_op->op = op;
-	composite_op->source_picture = pSrcPicture;
-	composite_op->mask_picture = pMaskPicture;
-	composite_op->dest_picture = pDstPicture;
-	composite_op->source = pSrc;
-	composite_op->mask = pMask;
-	composite_op->dest = pDst;
+	intel->render_source_picture = pSrcPicture;
+	intel->render_mask_picture = pMaskPicture;
+	intel->render_dest_picture = pDstPicture;
+	intel->render_source = pSrc;
+	intel->render_mask = pMask;
+	intel->render_dest = pDst;
 	drm_intel_bo_unreference(composite_op->binding_table_bo);
 	composite_op->binding_table_bo = binding_table_bo;
 	composite_op->src_filter =
@@ -1602,7 +1594,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 			    ("Couldn't fit render operation in aperture\n");
 	}
 
-	render_state->needs_state_emit = TRUE;
+	intel->needs_render_state_emit = TRUE;
 
 	return TRUE;
 }
@@ -1770,7 +1762,7 @@ i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 		intel_batch_flush(scrn, FALSE);
 
 	intel_batch_start_atomic(scrn, 200);
-	if (render_state->needs_state_emit)
+	if (intel->needs_render_state_emit)
 		i965_emit_composite_state(scrn);
 
 	BEGIN_BATCH(12);
@@ -1821,7 +1813,7 @@ void i965_batch_flush_notify(ScrnInfoPtr scrn)
 		render_state->vertex_buffer_bo = NULL;
 	}
 
-	render_state->needs_state_emit = TRUE;
+	intel->needs_render_state_emit = TRUE;
 }
 
 /**