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authorAlex Deucher <alexdeucher@gmail.com>2010-08-05 17:26:28 -0400
committerAlex Deucher <alexdeucher@gmail.com>2010-08-05 17:36:36 -0400
commitb5bfdbd70d9671250957ccd41dfc8818850d257e (patch)
tree315fb46fde7773a628ad0b301a27278b48ff65a8 /src/radeon_exa.c
parenta3c59c6f6be7067421e348142da0ca13428dcd57 (diff)
r6xx/r7xx: add support for tiling with kms (v3)
Requires radeon drm 2.6.0 and updated mesa. v2: - fix lockup due to not emiting DB_DEPTH_INFO https://bugs.freedesktop.org/show_bug.cgi?id=28342 - fix drm minor version to deal with evergreen accel v3: rebase on current ddx git Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/radeon_exa.c')
-rw-r--r--src/radeon_exa.c26
1 files changed, 21 insertions, 5 deletions
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 7dd792e6..814c8641 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -430,11 +430,27 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height,
tiling &= ~RADEON_TILING_MACRO;
}
- if (tiling) {
- height = RADEON_ALIGN(height, 16);
- pixmap_align = 256;
- } else
- pixmap_align = 64;
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ int bpe = bitsPerPixel / 8;
+
+ if (tiling & RADEON_TILING_MACRO) {
+ height = RADEON_ALIGN(height, info->num_banks * 8);
+ pixmap_align = MAX(info->num_banks,
+ (((info->group_bytes / 8) / bpe) * info->num_banks)) * 8 * bpe;
+ } else if (tiling & RADEON_TILING_MICRO) {
+ height = RADEON_ALIGN(height, 8);
+ pixmap_align = MAX(8, (info->group_bytes / (8 * bpe))) * bpe;
+ } else {
+ height = RADEON_ALIGN(height, 8);
+ pixmap_align = 256; /* 8 * bpe */
+ }
+ } else {
+ if (tiling) {
+ height = RADEON_ALIGN(height, 16);
+ pixmap_align = 256;
+ } else
+ pixmap_align = 64;
+ }
padded_width = ((width * bitsPerPixel + FB_MASK) >> FB_SHIFT) * sizeof(FbBits);
padded_width = RADEON_ALIGN(padded_width, pixmap_align);