Catch unsubstituted macro for PCI region base access

also fix up some warnings.

2 files changed, 21 insertions, 15 deletions

diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 960d784c..f1a780d4 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -925,7 +925,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
 	       "[agp] %d kB allocated with handle 0x%08x\n",
-	       info->dri->gartSize*1024, info->dri->agpMemHandle);
+	       info->dri->gartSize*1024,
+	       (unsigned int)info->dri->agpMemHandle);
 
     if (drmAgpBind(info->dri->drmFD,
 		   info->dri->agpMemHandle, info->dri->gartOffset) < 0) {
@@ -942,7 +943,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	return FALSE;
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
-	       "[agp] ring handle = 0x%08x\n", info->dri->ringHandle);
+	       "[agp] ring handle = 0x%08x\n",
+	       (unsigned int)info->dri->ringHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize,
 	       &info->dri->ring) < 0) {
@@ -961,7 +963,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
  	       "[agp] ring read ptr handle = 0x%08x\n",
-	       info->dri->ringReadPtrHandle);
+	       (unsigned int)info->dri->ringReadPtrHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize,
 	       &info->dri->ringReadPtr) < 0) {
@@ -981,7 +983,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
  	       "[agp] vertex/indirect buffers handle = 0x%08x\n",
-	       info->dri->bufHandle);
+	       (unsigned int)info->dri->bufHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->bufHandle, info->dri->bufMapSize,
 	       &info->dri->buf) < 0) {
@@ -1001,7 +1003,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
  	       "[agp] GART texture map handle = 0x%08x\n",
-	       info->dri->gartTexHandle);
+	       (unsigned int)info->dri->gartTexHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->gartTexHandle, info->dri->gartTexMapSize,
 	       &info->dri->gartTex) < 0) {
@@ -1034,7 +1036,8 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
 	       "[pci] %d kB allocated with handle 0x%08x\n",
-	       info->dri->gartSize*1024, info->dri->pciMemHandle);
+	       info->dri->gartSize*1024,
+	       (unsigned int)info->dri->pciMemHandle);
 
     RADEONDRIInitGARTValues(info);
 
@@ -1045,7 +1048,8 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	return FALSE;
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
-	       "[pci] ring handle = 0x%08x\n", info->dri->ringHandle);
+	       "[pci] ring handle = 0x%08x\n",
+	       (unsigned int)info->dri->ringHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize,
 	       &info->dri->ring) < 0) {
@@ -1067,7 +1071,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
  	       "[pci] ring read ptr handle = 0x%08x\n",
-	       info->dri->ringReadPtrHandle);
+	       (unsigned int)info->dri->ringReadPtrHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize,
 	       &info->dri->ringReadPtr) < 0) {
@@ -1090,7 +1094,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
  	       "[pci] vertex/indirect buffers handle = 0x%08x\n",
-	       info->dri->bufHandle);
+	       (unsigned int)info->dri->bufHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->bufHandle, info->dri->bufMapSize,
 	       &info->dri->buf) < 0) {
@@ -1113,7 +1117,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
  	       "[pci] GART texture map handle = 0x%08x\n",
-	       info->dri->gartTexHandle);
+	       (unsigned int)info->dri->gartTexHandle);
 
     if (drmMap(info->dri->drmFD, info->dri->gartTexHandle, info->dri->gartTexMapSize,
 	       &info->dri->gartTex) < 0) {
@@ -1140,7 +1144,8 @@ static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	return FALSE;
     }
     xf86DrvMsg(pScreen->myNum, X_INFO,
-	       "[drm] register handle = 0x%08x\n", info->dri->registerHandle);
+	       "[drm] register handle = 0x%08x\n",
+	       (unsigned int)info->dri->registerHandle);
 
     return TRUE;
 }
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index d670ab52..a8884362 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1774,14 +1774,14 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
     if (dev->BiosBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		   "BIOS address override, using 0x%08lx instead of 0x%08lx\n",
-		   dev->BiosBase,
-		   info->BIOSAddr);
+		   (unsigned long)dev->BiosBase,
+		   (unsigned long)info->BIOSAddr);
 	info->BIOSAddr = dev->BiosBase;
 	from           = X_CONFIG;
     }
     if (info->BIOSAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, from,
-		   "BIOS at 0x%08lx\n", info->BIOSAddr);
+		   "BIOS at 0x%08lx\n", (unsigned long)info->BIOSAddr);
     }
 #endif
 
@@ -2750,7 +2750,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     info->MMIOAddr = PCI_REGION_BASE(info->PciInfo, 2, REGION_MEM) & ~0xffULL;
     info->MMIOSize = PCI_REGION_SIZE(info->PciInfo, 2);
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TOTO SAYS %016llx\n", 
-		(unsigned long long)info->PciInfo->regions[2].base_addr);
+		(unsigned long long)PCI_REGION_BASE(info->PciInfo,
+		2, REGION_MEM));
     if (info->pEnt->device->IOBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
 		   "MMIO address override, using 0x%08lx instead of 0x%016llx\n",