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| author | Thierry Reding <treding@nvidia.com> | 2013-11-15 15:47:03 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-01-10 10:15:37 +0100 |
| commit | 7603a247a93d3c426e27bb191ab7e02da24cb1ae (patch) | |
| tree | 987b3b4f209f06b1eae4d9001c29796831054977 | |
| parent | 6956fcf81199c8ff188d52df85bfe0d45414389e (diff) | |
ARM: tegra: Enable eDP for Venice2
Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the
Tegra124. The panel has an EDID to describe the video timings but needs
a few extra nodes to get the backlight to come up.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra124-venice2.dts | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index b6aa93afa5e3..18690ec51524 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -16,6 +16,20 @@ reg = <0x80000000 0x80000000>; }; + host1x@50000000 { + sor@54540000 { + status = "okay"; + + nvidia,dpaux = <&dpaux>; + nvidia,panel = <&panel>; + }; + + dpaux: dpaux@545c0000 { + vdd-supply = <&panel_3v3_reg>; + status = "okay"; + }; + }; + pinmux: pinmux@70000868 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_default>; @@ -940,6 +954,17 @@ }; }; + backlight: backlight { + compatible = "pwm-backlight"; + + enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + power-supply = <&vdd_bl_reg>; + pwms = <&pwm 1 1000000>; + + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; @@ -965,6 +990,13 @@ }; }; + panel: panel { + compatible = "lg,lp129qe", "simple-panel"; + + backlight = <&backlight>; + ddc-i2c-bus = <&dpaux>; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -995,7 +1027,8 @@ regulator-name = "vdd-bl"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; + enable-active-high; }; vdd_ts_sw_5v0: regulator@5 { |