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-rw-r--r--src/nv_bios.c6
-rw-r--r--src/nv_crtc.c12
-rw-r--r--src/nv_driver.c4
-rw-r--r--src/nv_type.h2
-rw-r--r--src/nvreg.h59
5 files changed, 42 insertions, 41 deletions
diff --git a/src/nv_bios.c b/src/nv_bios.c
index 99ffc26..0291a3c 100644
--- a/src/nv_bios.c
+++ b/src/nv_bios.c
@@ -1961,7 +1961,7 @@ static bool init_configure_mem(ScrnInfoPtr pScrn, bios_t *bios, uint16_t offset,
if (bios->major_version > 2)
return false;
- uint16_t meminitoffs = bios->legacy.mem_init_tbl_ptr + MEM_INIT_SIZE * (nv_idx_port_rd(pScrn, CRTC_INDEX_COLOR, NV_VGA_CRTCX_3C) >> 4);
+ uint16_t meminitoffs = bios->legacy.mem_init_tbl_ptr + MEM_INIT_SIZE * (nv_idx_port_rd(pScrn, CRTC_INDEX_COLOR, NV_VGA_CRTCX_SCRATCH4) >> 4);
uint16_t seqtbloffs = bios->legacy.sdr_seq_tbl_ptr, meminitdata = meminitoffs + 6;
uint32_t reg, data;
@@ -2013,7 +2013,7 @@ static bool init_configure_clk(ScrnInfoPtr pScrn, bios_t *bios, uint16_t offset,
if (bios->major_version > 2)
return false;
- uint16_t meminitoffs = bios->legacy.mem_init_tbl_ptr + MEM_INIT_SIZE * (nv_idx_port_rd(pScrn, CRTC_INDEX_COLOR, NV_VGA_CRTCX_3C) >> 4);
+ uint16_t meminitoffs = bios->legacy.mem_init_tbl_ptr + MEM_INIT_SIZE * (nv_idx_port_rd(pScrn, CRTC_INDEX_COLOR, NV_VGA_CRTCX_SCRATCH4) >> 4);
int clock;
clock = le16_to_cpu(*(uint16_t *)&bios->data[meminitoffs + 4]) * 10;
@@ -2046,7 +2046,7 @@ static bool init_configure_preinit(ScrnInfoPtr pScrn, bios_t *bios, uint16_t off
uint32_t straps = nv32_rd(pScrn, NV_PEXTDEV_BOOT_0);
uint8_t cr3c = ((straps << 2) & 0xf0) | (straps & (1 << 6));
- nv_idx_port_wr(pScrn, CRTC_INDEX_COLOR, NV_VGA_CRTCX_3C, cr3c);
+ nv_idx_port_wr(pScrn, CRTC_INDEX_COLOR, NV_VGA_CRTCX_SCRATCH4, cr3c);
return true;
}
diff --git a/src/nv_crtc.c b/src/nv_crtc.c
index b6b723c..06547b3 100644
--- a/src/nv_crtc.c
+++ b/src/nv_crtc.c
@@ -1449,7 +1449,7 @@ nv_crtc_mode_set_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adju
/* These values seem to vary */
/* This register seems to be used by the bios to make certain decisions on some G70 cards? */
- regp->CRTC[NV_VGA_CRTCX_3C] = savep->CRTC[NV_VGA_CRTCX_3C];
+ regp->CRTC[NV_VGA_CRTCX_SCRATCH4] = savep->CRTC[NV_VGA_CRTCX_SCRATCH4];
if (NVMatchModePrivate(mode, NV_MODE_VGA)) {
regp->CRTC[NV_VGA_CRTCX_45] = 0x0;
@@ -1486,7 +1486,7 @@ nv_crtc_mode_set_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adju
if (pNv->twoHeads)
/* The exact purpose of this register is unknown, but we copy value from crtc0 */
- regp->unk81c = NVReadCRTC(pNv, 0, NV_CRTC_081C);
+ regp->gpio_ext = NVReadCRTC(pNv, 0, NV_PCRTC_GPIO_EXT);
if (NVMatchModePrivate(mode, NV_MODE_VGA)) {
regp->unk830 = 0;
@@ -2372,7 +2372,7 @@ static void nv_crtc_load_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state, Bool
NVCrtcWriteCRTC(crtc, NV_CRTC_0834, regp->unk834);
if (pNv->Architecture == NV_ARCH_40) {
NVCrtcWriteCRTC(crtc, NV_CRTC_0850, regp->unk850);
- NVCrtcWriteCRTC(crtc, NV_CRTC_081C, regp->unk81c);
+ NVCrtcWriteCRTC(crtc, NV_PCRTC_GPIO_EXT, regp->gpio_ext);
}
if (pNv->Architecture == NV_ARCH_40) {
@@ -2409,7 +2409,7 @@ static void nv_crtc_load_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state, Bool
NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_26, regp->CRTC[NV_VGA_CRTCX_26]);
NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_3B, regp->CRTC[NV_VGA_CRTCX_3B]);
- NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_3C, regp->CRTC[NV_VGA_CRTCX_3C]);
+ NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_SCRATCH4, regp->CRTC[NV_VGA_CRTCX_SCRATCH4]);
if (pNv->Architecture >= NV_ARCH_10) {
NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_EXTRA, regp->CRTC[NV_VGA_CRTCX_EXTRA]);
NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_43, regp->CRTC[NV_VGA_CRTCX_43]);
@@ -2497,7 +2497,7 @@ static void nv_crtc_save_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state)
regp->unk834 = NVCrtcReadCRTC(crtc, NV_CRTC_0834);
if (pNv->Architecture == NV_ARCH_40) {
regp->unk850 = NVCrtcReadCRTC(crtc, NV_CRTC_0850);
- regp->unk81c = NVCrtcReadCRTC(crtc, NV_CRTC_081C);
+ regp->gpio_ext = NVCrtcReadCRTC(crtc, NV_PCRTC_GPIO_EXT);
}
if (pNv->twoHeads) {
regp->head = NVCrtcReadCRTC(crtc, NV_CRTC_FSEL);
@@ -2511,7 +2511,7 @@ static void nv_crtc_save_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state)
regp->CRTC[NV_VGA_CRTCX_26] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_26);
regp->CRTC[NV_VGA_CRTCX_3B] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_3B);
- regp->CRTC[NV_VGA_CRTCX_3C] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_3C);
+ regp->CRTC[NV_VGA_CRTCX_SCRATCH4] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_SCRATCH4);
if (pNv->Architecture >= NV_ARCH_10) {
regp->CRTC[NV_VGA_CRTCX_EXTRA] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_EXTRA);
regp->CRTC[NV_VGA_CRTCX_43] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_43);
diff --git a/src/nv_driver.c b/src/nv_driver.c
index eadaa6c..51dffda 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -2266,13 +2266,13 @@ static void NVBacklightEnable(NVPtr pNv, Bool on)
/* NV17,18,34 Apple iMac, iBook, PowerBook */
CARD32 tmp_pmc, tmp_pcrt;
tmp_pmc = nvReadMC(pNv, 0x10F0) & 0x7FFFFFFF;
- tmp_pcrt = nvReadCRTC0(pNv, NV_CRTC_081C) & 0xFFFFFFFC;
+ tmp_pcrt = nvReadCRTC0(pNv, NV_PCRTC_GPIO_EXT) & 0xFFFFFFFC;
if(on) {
tmp_pmc |= (1 << 31);
tmp_pcrt |= 0x1;
}
nvWriteMC(pNv, 0x10F0, tmp_pmc);
- nvWriteCRTC0(pNv, NV_CRTC_081C, tmp_pcrt);
+ nvWriteCRTC0(pNv, NV_PCRTC_GPIO_EXT, tmp_pcrt);
}
#endif
diff --git a/src/nv_type.h b/src/nv_type.h
index 1a5423e..44a2378 100644
--- a/src/nv_type.h
+++ b/src/nv_type.h
@@ -109,10 +109,10 @@ typedef struct _nv_crtc_reg
uint32_t cursorConfig;
uint32_t crtcOwner;
uint32_t gpio;
+ uint32_t gpio_ext;
uint32_t unk830;
uint32_t unk834;
uint32_t unk850;
- uint32_t unk81c;
uint32_t head;
uint32_t config;
diff --git a/src/nvreg.h b/src/nvreg.h
index 204cbce..79d2204 100644
--- a/src/nvreg.h
+++ b/src/nvreg.h
@@ -135,7 +135,7 @@
#define NV_VGA_CRTCX_LCD 0x33
#define NV_VGA_CRTCX_INTERLACE 0x39
#define NV_VGA_CRTCX_3B 0x3b
-#define NV_VGA_CRTCX_3C 0x3c
+#define NV_VGA_CRTCX_SCRATCH4 0x3c
#define NV_VGA_CRTCX_EXTRA 0x41
#define NV_VGA_CRTCX_43 0x43
#define NV_VGA_CRTCX_OWNER 0x44
@@ -181,6 +181,35 @@
#define NV_PEXTDEV_BOOT_0 0x00101000
# define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT (1 << 15)
+#define NV_PEXTDEV_BOOT_3 0x0010100c
+
+#define NV_CRTC_INTR_0 0x00600100
+# define NV_CRTC_INTR_VBLANK (1<<0)
+#define NV_CRTC_INTR_EN_0 0x00600140
+#define NV_CRTC_START 0x00600800
+#define NV_CRTC_CONFIG 0x00600804
+#define NV_CRTC_CURSOR_ADDRESS 0x0060080C
+#define NV_CRTC_CURSOR_CONFIG 0x00600810
+# define NV_CRTC_CURSOR_CONFIG_ENABLE (1 << 0)
+# define NV_CRTC_CURSOR_CONFIG_DOUBLE_SCAN (1 << 4)
+# define NV_CRTC_CURSOR_CONFIG_32BPP (1 << 12)
+# define NV_CRTC_CURSOR_CONFIG_64PIXELS (1 << 16)
+# define NV_CRTC_CURSOR_CONFIG_32LINES (1 << 25)
+# define NV_CRTC_CURSOR_CONFIG_64LINES (1 << 26)
+# define NV_CRTC_CURSOR_CONFIG_ALPHA_BLEND (1 << 28)
+
+#define NV_CRTC_GPIO 0x00600818
+#define NV_PCRTC_GPIO_EXT 0x0060081c
+#define NV_CRTC_0830 0x00600830
+#define NV_CRTC_0834 0x00600834
+#define NV_CRTC_0850 0x00600850
+#define NV_CRTC_FSEL 0x00600860
+# define NV_CRTC_FSEL_I2C (1<<4)
+# define NV_CRTC_FSEL_TVOUT1 (1<<8)
+# define NV_CRTC_FSEL_TVOUT2 (2<<8)
+# define NV_CRTC_FSEL_OVERLAY (1<<12)
+# define NV_CRTC_FSEL_FPP2 (1<<16)
+# define NV_CRTC_FSEL_FPP1 (2<<16)
#define NV_RAMDAC_CURSOR_POS 0x00680300
#define NV_RAMDAC_CURSOR_CTRL 0x00680320
@@ -339,34 +368,6 @@
#define NV_RAMDAC_A24 0x00680A24
#define NV_RAMDAC_A34 0x00680A34
-#define NV_CRTC_INTR_0 0x00600100
-# define NV_CRTC_INTR_VBLANK (1<<0)
-#define NV_CRTC_INTR_EN_0 0x00600140
-#define NV_CRTC_START 0x00600800
-#define NV_CRTC_CONFIG 0x00600804
-#define NV_CRTC_CURSOR_ADDRESS 0x0060080C
-#define NV_CRTC_CURSOR_CONFIG 0x00600810
-# define NV_CRTC_CURSOR_CONFIG_ENABLE (1 << 0)
-# define NV_CRTC_CURSOR_CONFIG_DOUBLE_SCAN (1 << 4)
-# define NV_CRTC_CURSOR_CONFIG_32BPP (1 << 12)
-# define NV_CRTC_CURSOR_CONFIG_64PIXELS (1 << 16)
-# define NV_CRTC_CURSOR_CONFIG_32LINES (1 << 25)
-# define NV_CRTC_CURSOR_CONFIG_64LINES (1 << 26)
-# define NV_CRTC_CURSOR_CONFIG_ALPHA_BLEND (1 << 28)
-
-#define NV_CRTC_GPIO 0x00600818
-#define NV_CRTC_081C 0x0060081c
-#define NV_CRTC_0830 0x00600830
-#define NV_CRTC_0834 0x00600834
-#define NV_CRTC_0850 0x00600850
-#define NV_CRTC_FSEL 0x00600860
-# define NV_CRTC_FSEL_I2C (1<<4)
-# define NV_CRTC_FSEL_TVOUT1 (1<<8)
-# define NV_CRTC_FSEL_TVOUT2 (2<<8)
-# define NV_CRTC_FSEL_OVERLAY (1<<12)
-# define NV_CRTC_FSEL_FPP2 (1<<16)
-# define NV_CRTC_FSEL_FPP1 (2<<16)
-
#define NV_PGRAPH_DEBUG_0 0x00400080
#define NV_PGRAPH_DEBUG_1 0x00400084
#define NV_PGRAPH_DEBUG_2_NV04 0x00400088
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-13 12:03:05 +0000