diff options
| author | Stuart Bennett <stuart@freedesktop.org> | 2009-04-07 14:37:05 +0100 |
|---|---|---|
| committer | Stuart Bennett <stuart@freedesktop.org> | 2009-05-06 14:27:43 +0100 |
| commit | 6c209a87d2d90b39fddc446378b370bd7fb81f6b (patch) | |
| tree | 533373527cf35f07a6d8d8b146d2ca4a48162681 /src/nvreg.h | |
| parent | 3971dda57004894d5d4fc9420aa00da400815af9 (diff) | |
randr12: pre-nv17 load detection
Sampling heuristic as close to nvidia's as mmiotrace-based inference admits
Works on both nv05 and nv11
Diffstat (limited to 'src/nvreg.h')
| -rw-r--r-- | src/nvreg.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/nvreg.h b/src/nvreg.h index 30c0f01..ef750c2 100644 --- a/src/nvreg.h +++ b/src/nvreg.h @@ -195,6 +195,7 @@ # define NV_CIO_AR_PLANE_INDEX 0x12 # define NV_CIO_AR_HPP_INDEX 0x13 # define NV_CIO_AR_CSEL_INDEX 0x14 +#define NV_PRMCIO_INP0 0x006013c2 #define NV_PRMCIO_CRX__COLOR 0x006013d4 #define NV_PRMCIO_CR__COLOR 0x006013d5 /* Standard VGA CRTC registers */ @@ -257,6 +258,7 @@ # define NV_CIO_CR_ARX_INDEX 0x26 /* attribute index -- ro copy of 0x60.3c0 */ # define NV_CIO_CRE_CHIP_ID_INDEX 0x27 /* chip revision */ # define NV_CIO_CRE_PIXEL_INDEX 0x28 +# define NV_CIO_CRE_PIXEL_FORMAT 1:0 # define NV_CIO_CRE_HEB__INDEX 0x2d /* horizontal extra bits? */ # define NV_CIO_CRE_HEB_HDT_8 0:0 # define NV_CIO_CRE_HEB_HDE_8 1:1 @@ -339,6 +341,9 @@ # define NV_RAMDAC_580_VPLL2_ACTIVE (1 << 28) #define NV_PRAMDAC_GENERAL_CONTROL 0x00680600 +# define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON (3 << 4) +# define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM (2 << 16) +# define NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS (1 << 20) #define NV_PRAMDAC_TEST_CONTROL 0x00680608 # define NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED (1 << 12) # define NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_OFF (1 << 16) |