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3 hoursasahi: extend epilog key for force early frag handlingAlyssa Rosenzweig2-11/+25
need to be extra careful around the sample mask. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
3 hoursasahi: lower texture instructions with epilogsAlyssa Rosenzweig1-0/+1
for eMRT Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
3 hoursasahi: fix sample ID with multiblock epilogsAlyssa Rosenzweig1-2/+10
eMRT + MSAA + epilog case. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
3 hoursasahi: fix store_output component/offsetAlyssa Rosenzweig1-1/+3
with epilogs Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
3 hoursasahi: cleanup fs epilog link infoAlyssa Rosenzweig3-15/+13
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
6 daysv3dv: fixes StencilTestEnable handlingAlejandro Piñeiro2-30/+33
While working on VK_EXT_extended_dynamic_state2 we found two issues the stencil emission code, after the update for StencilTestEnable being dynamic. Specifically: * pack_stencil_cfg: if we don't have a ds_info, we need to return, as pack_single_stencil_cfg uses it to fill it up. Also the check for MESA_VK_DYNAMIC_DS_STENCIL_TEST_ENABLE was not needed. That state doesn't affect the content of the STENCIL_CFG packet. Stencil is enabled/disabled at the CFG_BITS packet. * cmd_buffer_emit_stencil: we can't use pipeline->emit_stencil_cfg to filter if it is needed to emit that as since stencil_test_enable and stencil_op become dynamic. We also update which states we check that are dynamic. As mentioned STENCIL_TEST_ENABLE doesn't affect here. Fixes: 60e9237e81c ("v3dv: StencilOp and StencilTestEnable are now dynamic") Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980>
7 daysci/lima: expect fail of window_8888_colorspace_srgb on waylandMykhailo Skorokhodov1-0/+2
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29052>
7 daysegl/wayland: Fix sRGB format look up for configMykhailo Skorokhodov1-0/+3
That check should help with situations when the dri2_wl_visual_idx_from_pipe_format function can't recognize pipe_format as before. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10829 Fixes: 6a084e2b("egl/wayland: Use pipe_format to look up configs") Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29052>
11 daysradv: add a new dirty state for emitting the color output stateSamuel Pitoiset4-85/+61
SPI_SHADER_COL_FORMAT/CB_SHADER_MASK are used slightly differently for PS epilogs, shader objects and monolithic graphics pipelines. This introduces a new state that will allow us to emit these two registers in only place. The main motivation is for depth-only RB+ support and for tracking context registers in the cmdbuf. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
11 daysradv: store cb_shader_mask for fragment shaders and epilogsSamuel Pitoiset6-3/+9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
2024-04-26v3dv: StencilOp and StencilTestEnable are now dynamicAlejandro Piñeiro4-50/+57
This commit introduces a significant change when we emit STENCIL_CFG, with any dynamic state: we stop to use cl_emit_with_prepacked, and use directly cl_emit. The reason is that now most of the STENCIL_CFG parameters are dynamic, any improvement of using cl_emit_with_prepacked is minimized. Also gets the code simpler, and avoid the need to be extra careful with the fact that cl_emit_with_prepaked doesn't override values. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609>
2024-04-24radeonsi: move TCS epilog key bits to the key->ge.opt sectionMarek Olšák4-22/+12
Since the TCS epilog is no more, this is required to apply those bits to monolithic shaders. tessfactors_are_def_in_all_invocs was unused. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
2024-04-23ir3: remove unnecessary tessellation epilogueJob Noorman3-58/+0
The tessellation epilogue was emitted as an empty predt/prede pair which has no functional use so can be removed. Signed-off-by: Job Noorman <jnoorman@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27982>
2024-04-17radv: clear color attachments without exports before compactionSamuel Pitoiset3-9/+8
For PS epilogs, this isn't necessary because spi_shader_col_format is already cleared. This will help for implementing color attachment remapping because colors_written is always the original mapping. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28781>
2024-04-16radv: simplify checking for PS epilogs in radv_pipeline_init_blend_state()Samuel Pitoiset1-7/+3
This is equivalent. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28672>
2024-04-15etnaviv: hwdb: Drop stdint.h dependencyChristian Gmeiner1-2/+2
This seems to cause some troubles for distro builds. Fixes: 394652e5a02 ("etnaviv: hwdb: Generate hwdb.h") Closes: #11012 Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28745>
2024-04-01radv: advertise extendedDynamicState3AlphaToOneEnable with ACOSamuel Pitoiset5-49/+1
PS epilogs aren't supported with LLVM. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28434>
2024-03-30ac/nir/tess: Remove dead code that was meant for epilogs.Timur Kristóf4-57/+10
We no longer need to emit store_output intrinsics at the end of the shaders. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28425>
2024-03-30aco: Delete all TCS epilog code.Timur Kristóf5-348/+1
Now that neither RADV nor RadeonSI uses TCS epilogs, we don't need to keep the code to compile them in ACO either. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28425>
2024-03-30radeonsi: Delete TCS epilogs entirely.Timur Kristóf9-610/+5
Always emit the tessellation factor writes in the main shader, which is doable now that the necessary information is in the tcs_offchip_layout SGPR. This eliminates the need for TCS epilogs, so delete them entirely from RadeonSI. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28425>
2024-03-30radeonsi: Implement dynamic TCS intrinsics for non-monolithic shaders.Timur Kristóf3-3/+17
Put the primitive mode and whether TES reads tess factors into the tcs_offchip_layout SGPR, so they can be used by the main shader instead of needing the epilog. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28425>
2024-03-30asahi: switch to VS/FS prolog/epilog systemAlyssa Rosenzweig21-638/+1593
With the exception of some variants for framebuffer fetch (to be addressed in a follow up MR, this is big enough as it is) -- this switches us to a shader precompile path for VS & FS. VS prologs let us implement vertex buffer fetch with dynamic formats, FS prologs let us implement misc emulation like API sample masking and cull distance, while FS epilogs handle blending and tilebuffer stores. This should cut down shader recompile jank significantly in the GL driver. It also prepares us with most of what we need for big ticket Vulkan extensions like ESO, GPL, and EDS3. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28483>
2024-03-28radv, aco: Remove the code that jumped to RADV's TCS epilogs.Timur Kristóf3-87/+2
The actual TCS epilog selection code is kept unchanged for now, we'll delete it when RadeonSI also gets rid of TCS epilogs. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
2024-03-28radv: Completely delete TCS epilogs.Timur Kristóf10-232/+3
TCS epilogs are not needed anymore because the TCS can implement dynamic states by itself now. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
2024-03-28nir: Add two new AMD specific tess intrinsics.Timur Kristóf2-0/+6
These will be needed to implement some tessellation dynamic states within the TCS as opposed to using an epilog. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
2024-03-28radv, aco: Delete now dead TCS epilog code.Timur Kristóf4-54/+7
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28radv: Always pass tess factors to epilogs in registers.Timur Kristóf2-2/+3
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28radv: Declare tess_lvl_in/out args for TCS epilogs.Timur Kristóf3-0/+12
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28aco: Use tess factors when TCS jumps to epilog.Timur Kristóf1-1/+11
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-22radv: trigger a new PS epilog when the framebuffer is dirty with ESOSamuel Pitoiset1-1/+1
When a new framebuffer is used, the color output formats might have changed and a new PS epilog might need to be recompiled. This shouldn't affect graphics pipeline because color output formats must already match. This fixes a couple of failures/flakes like spec@ext_framebuffer_multisample@fast-clear with Zink and shader object. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28294>
2024-03-22radv: always export MRTZ in FS epilogs with ESO on GFX11Samuel Pitoiset1-2/+2
Alpha to coverage is special on RDNA3 and it needs to be emitted through MRTZ in some situations. Because we can't know this at compile time when everything is dynamic, we have to always emit MRTZ in PS epilogs. This fixes remaining failures on NAVI31 with Zink/ESO/RADV like spec@ext_packed_depth_stencil@fbo-depthstencil-gl_depth24_stencil8-drawpixels-float-and-ushort. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28297>
2024-03-11radv: fix emitting default blend state for PS without epilogs and ESOSamuel Pitoiset3-8/+27
When a fragment shader doesn't have any written color outputs it doesn't need a PS epilog because it's unnecessary. Though, with ESO the driver still needs to emit the default blend state like graphics pipelines. This fixes a bunch of flakes with ESO and Zink. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28008>
2024-03-11radv: re-emit RB+ state with PS epilogs only when the col format changesSamuel Pitoiset1-6/+8
RB+ was re-emitted every time a new PS epilog was requested even if the non-compacted color format was equal. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28008>
2024-03-11radv: stop using the custom blend mode for PS epilogsSamuel Pitoiset1-4/+5
Internal operations that set the custom blend mode are monolithic pipelines only, and the value should always be zero. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28008>
2024-03-08radv: add a helper to emit PS/TCS epilogsSamuel Pitoiset1-22/+21
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28042>
2024-03-08radv,aco: stop duplicating PS/TCS epilog fieldsSamuel Pitoiset7-21/+16
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28042>
2024-02-02radv: add support for emitting VS+TCS compiled separately on GFX9+Samuel Pitoiset5-12/+108
With a VS prolog, we end up with 3 long jumps (VS prolog->VS->TCS->TCS epilog), super annoying. The shaders config must also be combined between VS and TCS. This is for VK_EXT_shader_object. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27336>
2024-02-02radv: always emit PGM_RSRC1_HS when emitting the TCS epilog stateSamuel Pitoiset1-4/+4
This will simplify upcoming changes and it doesn't matter much because this is for ESO only. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27336>
2024-01-26radv: enable prologs/epilogs in-memory cache for shader objectsSamuel Pitoiset1-1/+10
Shader objects always use VS prologs/PS epilogs/TCS epilogs. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26930>
2024-01-26radv: re-emit the TCS epilog when a new TCS is boundSamuel Pitoiset1-0/+4
Similarly to VS prologs and PS epilogs, this needs to be re-emitted otherwise the config shader state can be overwritten. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26930>
2024-01-10radv: rework declaring color arguments for PS epilogsSamuel Pitoiset5-8/+15
Rely on the actual FS outputs instead of the spi shader col format, this is safer and it will help for future work. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26903>
2023-12-14radv: add support for MRT compaction with PS epilogsSamuel Pitoiset4-25/+18
Now that PS epilogs are always compiled during cmdbuf recording, we have all information to enable MRT compaction, for optimal performance. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26667>
2023-12-14radv: cleanup radv_pipeline_generate_ps_epilog_key()Samuel Pitoiset1-7/+3
This has no effects because key->spi_shader_col_format isn't used when the graphics pipeline needs to compile a PS epilog. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26663>
2023-12-14radv: cleanup gathering PS info with/without PS epilogsSamuel Pitoiset1-5/+8
To make it clear that some fields aren't used with PS epilogs. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26663>
2023-12-14radv: cleanup ac_nir_lower_ps optionsSamuel Pitoiset1-14/+19
To make it clear that some fields aren't used with PS epilogs. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26663>
2023-12-09asahi: rewrite pointsize handlingAlyssa Rosenzweig8-35/+109
In the wise words of Mike Blumenkrantz, "I hate gl_PointSize and so can you". The mesa/st lowering won't mesh well with vertex shader epilogues, and it falls over in various circumstances. I am too tired to go against the grain, so let's just pretend to be a normal gallium driver and trust in the rasterizer CSO, lowering point size internally. This properly handles transform feedback without any hacks, both GL and GLES behaviours, etc. Fixes: KHR-GL31.transform_feedback.capture_vertex_separate_test gl-2.0-large-point-fs Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26614>
2023-12-08radv: simplify disabling MRT compaction for PS epilogsSamuel Pitoiset1-7/+3
If the fragment shader isn't compiled, the PS epilog key isn't used at all with GPL. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26563>
2023-12-07v3dv: Use correct type VkStencilOp in function translate_stencil_opYonggang Luo1-1/+1
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26570>
2023-12-06radv: export MRTZ via PS epilogs when alpha to coverage is dynamic on GFX11Samuel Pitoiset1-1/+2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26250>
2023-12-06radv: determine and emit SPI_SHADER_Z_FORMAT for PS epilogsSamuel Pitoiset4-1/+14
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26413>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-14 07:45:03 +0000