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path: root/src/gallium/drivers/nvfx/nvfx_tex.h
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Diffstat (limited to 'src/gallium/drivers/nvfx/nvfx_tex.h')
-rw-r--r--src/gallium/drivers/nvfx/nvfx_tex.h175
1 files changed, 0 insertions, 175 deletions
diff --git a/src/gallium/drivers/nvfx/nvfx_tex.h b/src/gallium/drivers/nvfx/nvfx_tex.h
deleted file mode 100644
index 2f2d7378085..00000000000
--- a/src/gallium/drivers/nvfx/nvfx_tex.h
+++ /dev/null
@@ -1,175 +0,0 @@
1#ifndef NVFX_TEX_H_
2#define NVFX_TEX_H_
3
4#include "util/u_math.h"
5#include "pipe/p_defines.h"
6#include "pipe/p_state.h"
7
8
9static inline unsigned
10nvfx_tex_wrap_mode(unsigned wrap) {
11 unsigned ret;
12
13 switch (wrap) {
14 case PIPE_TEX_WRAP_REPEAT:
15 ret = NV30_3D_TEX_WRAP_S_REPEAT;
16 break;
17 case PIPE_TEX_WRAP_MIRROR_REPEAT:
18 ret = NV30_3D_TEX_WRAP_S_MIRRORED_REPEAT;
19 break;
20 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
21 ret = NV30_3D_TEX_WRAP_S_CLAMP_TO_EDGE;
22 break;
23 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
24 ret = NV30_3D_TEX_WRAP_S_CLAMP_TO_BORDER;
25 break;
26 case PIPE_TEX_WRAP_CLAMP:
27 ret = NV30_3D_TEX_WRAP_S_CLAMP;
28 break;
29 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
30 ret = NV40_3D_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE;
31 break;
32 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
33 ret = NV40_3D_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER;
34 break;
35 case PIPE_TEX_WRAP_MIRROR_CLAMP:
36 ret = NV40_3D_TEX_WRAP_S_MIRROR_CLAMP;
37 break;
38 default:
39 assert(0);
40 ret = NV30_3D_TEX_WRAP_S_REPEAT;
41 break;
42 }
43
44 return ret >> NV30_3D_TEX_WRAP_S__SHIFT;
45}
46
47static inline unsigned
48nvfx_tex_wrap_compare_mode(unsigned func)
49{
50 switch (func) {
51 case PIPE_FUNC_NEVER:
52 return NV30_3D_TEX_WRAP_RCOMP_NEVER;
53 case PIPE_FUNC_GREATER:
54 return NV30_3D_TEX_WRAP_RCOMP_GREATER;
55 case PIPE_FUNC_EQUAL:
56 return NV30_3D_TEX_WRAP_RCOMP_EQUAL;
57 case PIPE_FUNC_GEQUAL:
58 return NV30_3D_TEX_WRAP_RCOMP_GEQUAL;
59 case PIPE_FUNC_LESS:
60 return NV30_3D_TEX_WRAP_RCOMP_LESS;
61 case PIPE_FUNC_NOTEQUAL:
62 return NV30_3D_TEX_WRAP_RCOMP_NOTEQUAL;
63 case PIPE_FUNC_LEQUAL:
64 return NV30_3D_TEX_WRAP_RCOMP_LEQUAL;
65 case PIPE_FUNC_ALWAYS:
66 return NV30_3D_TEX_WRAP_RCOMP_ALWAYS;
67 default:
68 assert(0);
69 return 0;
70 }
71}
72
73static inline unsigned nvfx_tex_filter(const struct pipe_sampler_state* cso)
74{
75 unsigned filter = 0;
76 switch (cso->mag_img_filter) {
77 case PIPE_TEX_FILTER_LINEAR:
78 filter |= NV30_3D_TEX_FILTER_MAG_LINEAR;
79 break;
80 case PIPE_TEX_FILTER_NEAREST:
81 default:
82 filter |= NV30_3D_TEX_FILTER_MAG_NEAREST;
83 break;
84 }
85
86 switch (cso->min_img_filter) {
87 case PIPE_TEX_FILTER_LINEAR:
88 switch (cso->min_mip_filter) {
89 case PIPE_TEX_MIPFILTER_NEAREST:
90 filter |= NV30_3D_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST;
91 break;
92 case PIPE_TEX_MIPFILTER_LINEAR:
93 filter |= NV30_3D_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR;
94 break;
95 case PIPE_TEX_MIPFILTER_NONE:
96 default:
97 filter |= NV30_3D_TEX_FILTER_MIN_LINEAR;
98 break;
99 }
100 break;
101 case PIPE_TEX_FILTER_NEAREST:
102 default:
103 switch (cso->min_mip_filter) {
104 case PIPE_TEX_MIPFILTER_NEAREST:
105 filter |= NV30_3D_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST;
106 break;
107 case PIPE_TEX_MIPFILTER_LINEAR:
108 filter |= NV30_3D_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR;
109 break;
110 case PIPE_TEX_MIPFILTER_NONE:
111 default:
112 filter |= NV30_3D_TEX_FILTER_MIN_NEAREST;
113 break;
114 }
115 break;
116 }
117 return filter;
118}
119
120static inline unsigned nvfx_tex_border_color(const float* border_color)
121{
122 return ((float_to_ubyte(border_color[3]) << 24) |
123 (float_to_ubyte(border_color[0]) << 16) |
124 (float_to_ubyte(border_color[1]) << 8) |
125 (float_to_ubyte(border_color[2]) << 0));
126}
127
128struct nvfx_sampler_state {
129 uint32_t fmt;
130 uint32_t wrap;
131 uint32_t en;
132 uint32_t filt;
133 uint32_t bcol;
134 uint32_t min_lod;
135 uint32_t max_lod;
136 boolean compare;
137};
138
139struct nvfx_sampler_view {
140 struct pipe_sampler_view base;
141 int offset;
142 uint32_t swizzle;
143 uint32_t npot_size;
144 uint32_t filt;
145 uint32_t wrap_mask;
146 uint32_t wrap;
147 uint32_t lod_offset;
148 uint32_t max_lod_limit;
149 union
150 {
151 struct
152 {
153 uint32_t fmt[4]; /* nv30 has 4 entries, nv40 one */
154 int rect;
155 } nv30;
156 struct
157 {
158 uint32_t fmt[2]; /* nv30 has 4 entries, nv40 one */
159 uint32_t npot_size2; /* nv40 only */
160 } nv40;
161 uint32_t init_fmt;
162 } u;
163};
164
165struct nvfx_texture_format {
166 int fmt[6];
167 unsigned sign;
168 unsigned wrap;
169 unsigned char src[6];
170 unsigned char comp[6];
171};
172
173extern struct nvfx_texture_format nvfx_texture_formats[PIPE_FORMAT_COUNT];
174
175#endif /* NVFX_TEX_H_ */
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-09 01:23:12 +0000