summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndoni Morales Alastruey <amorales@flumotion.com>2010-06-10 11:04:38 +0100
committerZaheer Abbas Merali <zaheerabbas@merali.org>2010-06-10 11:04:38 +0100
commit2061fc0ccbd0c5f42d910133214ebd3d5f3dce42 (patch)
tree7305186b29df98dac4969413bb7ce7adb622fb38
parent269686fe35933286d6df38318ae82cc3fd0d2e91 (diff)
dv1394: Fix the internal clock even more
The cycleCount register is 13 bits long and the cycleOffset one is 12 bits long. To read the cycleCount register we need to shift 12 bits and not 13. Fixes #615461
-rw-r--r--ext/raw1394/gst1394clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/ext/raw1394/gst1394clock.c b/ext/raw1394/gst1394clock.c
index a14e2a28c..6f1546adc 100644
--- a/ext/raw1394/gst1394clock.c
+++ b/ext/raw1394/gst1394clock.c
@@ -128,7 +128,7 @@ gst_1394_clock_get_internal_time (GstClock * clock)
result = (((((guint64) _1394clock->cycle_timer_hi) << 32) |
cycle_timer) >> 25) * GST_SECOND;
/* add the microseconds from the cycleCount counter */
- result += (((cycle_timer >> 13) & 0x1fff) * 125) * GST_USECOND;
+ result += (((cycle_timer >> 12) & 0x1fff) * 125) * GST_USECOND;
GST_LOG_OBJECT (clock, "result %" GST_TIME_FORMAT, GST_TIME_ARGS (result));
} else {