From deb888ce53c17afd33f52433e49ba21b62ddba1d Mon Sep 17 00:00:00 2001 From: tstellar Date: Mon, 15 Oct 2012 20:53:45 +0000 Subject: R600: use floor intrinsic instead of llvm.AMDIL.floor Patch by: Vincent Lejeune Reviewed-by: Tom Stellard git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165970 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 + lib/Target/AMDGPU/AMDGPUIntrinsics.td | 1 - lib/Target/AMDGPU/R600Instructions.td | 2 +- lib/Target/AMDGPU/SIInstructions.td | 2 +- test/CodeGen/R600/floor.ll | 16 ++++++++++++++++ test/CodeGen/R600/llvm.AMDGPU.floor.ll | 16 ---------------- 6 files changed, 19 insertions(+), 19 deletions(-) create mode 100644 test/CodeGen/R600/floor.ll delete mode 100644 test/CodeGen/R600/llvm.AMDGPU.floor.ll diff --git a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 14477547aff..4f5749f6342 100644 --- a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -37,6 +37,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::FPOW, MVT::f32, Legal); setOperationAction(ISD::FLOG2, MVT::f32, Legal); setOperationAction(ISD::FABS, MVT::f32, Legal); + setOperationAction(ISD::FFLOOR, MVT::f32, Legal); setOperationAction(ISD::FRINT, MVT::f32, Legal); setOperationAction(ISD::UDIV, MVT::i32, Expand); diff --git a/lib/Target/AMDGPU/AMDGPUIntrinsics.td b/lib/Target/AMDGPU/AMDGPUIntrinsics.td index c5a7bebb745..cbda5bd8361 100644 --- a/lib/Target/AMDGPU/AMDGPUIntrinsics.td +++ b/lib/Target/AMDGPU/AMDGPUIntrinsics.td @@ -23,7 +23,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_cndlt : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_div : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_dp4 : Intrinsic<[llvm_float_ty], [llvm_v4f32_ty, llvm_v4f32_ty], [IntrNoMem]>; - def int_AMDGPU_floor : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_kill : Intrinsic<[], [llvm_float_ty], []>; def int_AMDGPU_kilp : Intrinsic<[], [], []>; def int_AMDGPU_lrp : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]>; diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td index 40e83e8e327..4ce256d1298 100644 --- a/lib/Target/AMDGPU/R600Instructions.td +++ b/lib/Target/AMDGPU/R600Instructions.td @@ -405,7 +405,7 @@ def RNDNE : R600_1OP < def FLOOR : R600_1OP < 0x14, "FLOOR", - [(set R600_Reg32:$dst, (int_AMDGPU_floor R600_Reg32:$src))] + [(set R600_Reg32:$dst, (ffloor R600_Reg32:$src))] >; let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td index eb282401497..fef8f5f27d3 100644 --- a/lib/Target/AMDGPU/SIInstructions.td +++ b/lib/Target/AMDGPU/SIInstructions.td @@ -573,7 +573,7 @@ defm V_RNDNE_F32 : VOP1_32 <0x00000023, "V_RNDNE_F32", [(set VReg_32:$dst, (frint AllReg_32:$src0))] >; defm V_FLOOR_F32 : VOP1_32 <0x00000024, "V_FLOOR_F32", - [(set VReg_32:$dst, (int_AMDGPU_floor AllReg_32:$src0))] + [(set VReg_32:$dst, (ffloor AllReg_32:$src0))] >; defm V_EXP_F32 : VOP1_32 <0x00000025, "V_EXP_F32", [(set VReg_32:$dst, (fexp2 AllReg_32:$src0))] diff --git a/test/CodeGen/R600/floor.ll b/test/CodeGen/R600/floor.ll new file mode 100644 index 00000000000..845330f2841 --- /dev/null +++ b/test/CodeGen/R600/floor.ll @@ -0,0 +1,16 @@ +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +;CHECK: FLOOR T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @test() { + %r0 = call float @llvm.R600.load.input(i32 0) + %r1 = call float @floor(float %r0) + call void @llvm.AMDGPU.store.output(float %r1, i32 0) + ret void +} + +declare float @llvm.R600.load.input(i32) readnone + +declare void @llvm.AMDGPU.store.output(float, i32) + +declare float @floor(float) readonly diff --git a/test/CodeGen/R600/llvm.AMDGPU.floor.ll b/test/CodeGen/R600/llvm.AMDGPU.floor.ll deleted file mode 100644 index a96419dde26..00000000000 --- a/test/CodeGen/R600/llvm.AMDGPU.floor.ll +++ /dev/null @@ -1,16 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: FLOOR T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @test() { - %r0 = call float @llvm.R600.load.input(i32 0) - %r1 = call float @llvm.AMDGPU.floor( float %r0) - call void @llvm.AMDGPU.store.output(float %r1, i32 0) - ret void -} - -declare float @llvm.R600.load.input(i32) readnone - -declare void @llvm.AMDGPU.store.output(float, i32) - -declare float @llvm.AMDGPU.floor(float ) readnone -- cgit v1.2.3