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2012-10-02Merge master branchtstellar1-48/+49
2012-10-02Merge TOTtstellar1-8/+8
2012-09-24Machine Model (-schedmodel only). Added SchedAliases.tstellar3-87/+295
2012-09-24[ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.tstellar1-2/+2
2012-09-24Whitespace.tstellar1-2/+2
2012-09-21Clarify comment.gribozavr1-1/+1
2012-09-19Add in new data types that are used by AMDIL/ANL among others.mvillmow1-0/+8
2012-09-19Soften the pattern-can-never-match error in TableGen into a warning. This pat...resistor1-2/+5
2012-09-19Remove code for setting the VEX L-bit as a function of operand size from the ...ctopper2-19/+2
2012-09-19SchedMachineModel: compress the CPU's WriteLatencyTable.atrick3-7/+44
2012-09-19Iterate deterministicaly over ClassInfo*'ssilvas1-2/+12
2012-09-19Iterate deterministically over register classessilvas1-2/+3
2012-09-19Refactor Record* by-ID comparator to Record.hsilvas2-18/+9
2012-09-18FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character ...d0k1-2/+2
2012-09-18Make custom operand parsing mnemonic indices use the same mnemonic table as t...ctopper1-34/+39
2012-09-18Use variable type for index into mnemonic table. Shrinks size of index field ...ctopper1-5/+14
2012-09-18Replaced ReInitMCSubtargetInfo with InitMCProcessor.atrick1-1/+2
2012-09-18comment typoatrick1-1/+1
2012-09-18TableGen subtarget emitter. Use getSchedClassIdx.atrick2-11/+1
2012-09-18TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...atrick1-0/+84
2012-09-18TableGen subtarget emitter. Remove unnecessary header dependence.atrick1-0/+1
2012-09-18TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...atrick1-6/+25
2012-09-18Mark asm matcher conversion table as const.ctopper1-5/+5
2012-09-18Fix typo in comment. No functional change.ctopper1-1/+1
2012-09-17Backout the wrong subtarget emitter fixatrick1-1/+1
2012-09-17Fix release build after revertingatrick1-2/+1
2012-09-17Revert r164061-r164067. Most of the new subtarget emitter.atrick3-113/+20
2012-09-17InitMCProcessoratrick1-1/+2
2012-09-17comment typoatrick1-1/+1
2012-09-17TableGen subtarget emitter. Use getSchedClassIdx.atrick2-11/+1
2012-09-17TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...atrick1-0/+84
2012-09-17TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...atrick1-7/+25
2012-09-17TableGen subtarget emitter. Format and emit data tables for the new machine m...atrick1-6/+117
2012-09-17TableGen subtarget emitter. Generate data tables for the new machine model.atrick1-2/+291
2012-09-17TableGen subtarget emitter. Emit processor resources for the new machine model.atrick1-10/+63
2012-09-17TableGen subtarget parser: Add getProcResourcesIdx().atrick1-0/+10
2012-09-17TableGen: Add initializer.grosbach1-1/+1
2012-09-17Fix a few vars that can end up being used without initialization.axel1-1/+1
2012-09-17Fix typohliao1-1/+1
2012-09-16Add 'virtual' keywoards to output file for overridden functions.ctopper1-5/+6
2012-09-16Add 'virtual' keywoards to output file for overridden functions.ctopper1-7/+7
2012-09-15Fix Doxygen issues: wrap code examples in \code and use \p to refer togribozavr1-4/+4
2012-09-15Revert r163878 as it breaks on targets with alternate register names. Such ta...ctopper2-6/+4
2012-09-15TableGen subtarget parser. Handle new machine model.atrick2-0/+219
2012-09-15TableGen subtarget parser. Handle new machine model.atrick2-0/+512
2012-09-15TableGen subtarget parser. Handle new machine model.atrick3-137/+816
2012-09-14Allow the second opcode info table to be 8, 16, or 32-bits as needed to repre...ctopper1-38/+32
2012-09-14Reduce size of register name index tables by using uint16_t for all in tree t...ctopper2-4/+6
2012-09-13AsmWriterEmitter: OpInfo2 should be unsigned 16-bit.mren1-1/+1
2012-09-13AsmWriterEmitter: increase the number of bits for OpcodeInfo from 32-bit toManman Ren1-11/+46
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