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AgeCommit message (Expand)AuthorFilesLines
2013-06-17Add a testcase for r184074.Rafael Espindola2-0/+23
2013-06-17AArch64: print relocation addends if present on AArch64Tim Northover1-0/+8
2013-06-16Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2-2/+2
2013-06-15DebugInfo: follow up to 184045 to constrain the tests further to ensure they ...David Blaikie4-5/+5
2013-06-15DebugInfo: print DBG_VALUE MachineInstrs with [] for deref and drop the offse...David Blaikie5-6/+6
2013-06-15Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick3-12/+14
2013-06-15Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE com...David Blaikie1-1/+1
2013-06-15[yaml2obj] Add support for sh_link via `Link` key.Sean Silva1-0/+3
2013-06-15R600: Add SI load support for v[24]i32 and store for v2i32Tom Stellard1-0/+19
2013-06-14Remove the LLVM specific archive index.Rafael Espindola2-3/+2
2013-06-14R600: Use correct encoding for Vertex Fetch instructions on CaymanTom Stellard1-0/+25
2013-06-14R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on CaymanTom Stellard1-0/+3
2013-06-14Mark rematerialized super/sub registers as dead.Tim Northover1-0/+23
2013-06-14Fix frame pointer debug information testJF Bastien1-2/+2
2013-06-14Do not to perform RUN line substitution of llc if that's prefixed by a hypnenEli Bendersky1-3/+9
2013-06-14SelectionDAG: Fix incorrect condition checks in some cases of folding FADD/FM...Stephen Lin1-4/+73
2013-06-14Make PrologEpilogInserter save/restore all callee saved registersDerek Schuff2-0/+54
2013-06-14ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville1-0/+3
2013-06-14X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ...Benjamin Kramer1-0/+8
2013-06-14Enable FastISel on ARM for Linux and NaCl, not MCJITJF Bastien25-12/+85
2013-06-14[yaml2obj] Add support for sh_addralign via `AddressAlign` key.Sean Silva1-2/+4
2013-06-13[yaml2obj] Add support for specifying raw section content.Sean Silva1-1/+6
2013-06-13[yaml2obj] Add sh_addr via `Address` key.Sean Silva1-0/+2
2013-06-13[yaml2obj] Initial ELF section support.Sean Silva2-1/+24
2013-06-13[PowerPC] Disable fast-isel for existing -O0 tests for PowerPC.Bill Schmidt10-34/+31
2013-06-13Fix DeleteDeadVarargs not to crash on functions referenced by BlockAddressesDerek Schuff1-0/+25
2013-06-13ARM: fix B decodingAmaury de la Vieuville1-0/+2
2013-06-13ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville1-0/+2
2013-06-13X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer1-0/+29
2013-06-12readobj: Dump PE/COFF optional records.Rui Ueyama2-0/+51
2013-06-12Always remove an alias when we rename the target.Rafael Espindola1-1/+12
2013-06-12Convert test to FileCheck.Rafael Espindola1-9/+17
2013-06-12[MC/DWARF] Support .debug_frame / .debug_line code alignment factorsUlrich Weigand1-2/+2
2013-06-12[PowerPC] Use assembler source in MC testsUlrich Weigand6-155/+152
2013-06-12[yaml2obj] Remove fragile test case.Sean Silva2-39/+0
2013-06-11[mips] Add an IR transformation pass that optimizes calls to sqrt.Akira Hatanaka1-0/+32
2013-06-11Change how globalopt handles aliases in llvm.used.Rafael Espindola1-4/+9
2013-06-11Rework r183728, suppress assert(0) for now. Its behavior depends on assertion...NAKAMURA Takumi2-6/+0
2013-06-11It adds support for negative zero offsets for loads and stores.Mihai Popa1-1/+4
2013-06-11This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ar...Mihai Popa2-2/+18
2013-06-11ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville3-38/+62
2013-06-11ARM: Fix STREX/LDREX reecodingAmaury de la Vieuville2-0/+28
2013-06-11Tweak a couple of tests on win32 hosts with +Asserts.NAKAMURA Takumi2-0/+6
2013-06-11Fix dubious type name similar to member name.Sean Silva5-5/+5
2013-06-10[yaml2obj] Initial ELF support.Sean Silva7-0/+79
2013-06-10ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one.Tim Northover5-3/+36
2013-06-10X86: Stop LEA64_32r doing unspeakable things to its arguments.Tim Northover3-6/+8
2013-06-10[PowerPC] Support extended sc mnemonicUlrich Weigand1-0/+2
2013-06-10[PowerPC] Support branch mnemonics with implied CR0Ulrich Weigand1-1/+197
2013-06-10ARM: ISB cannot be passed the same options as DMBAmaury de la Vieuville6-0/+22
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