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2012-10-03SI: Add sanity testtstellar1-0/+37
2012-10-02Merge master branchtstellar10-7/+233
2012-10-02R600: improve select_cc lowering to generate CND* more oftentstellar2-0/+22
2012-10-02Merge master branchtstellar74-99/+3549
2012-10-02Merge TOTtstellar11-6/+303
2012-09-24R600: Handle loads from the constants address space.tstellar1-0/+9
2012-09-24R600: Expand vector fadd and fmul on R600tstellar2-0/+30
2012-09-24R600: Add support for v4f32 stores on R600tstellar1-0/+9
2012-09-24R600: Add optimization for FP_ROUNDtstellar1-0/+11
2012-09-24R600: Add support for i8 reads on R600tstellar1-0/+10
2012-09-24R600: Replace AMDGPU pow intrinsic with the llvm versiontstellar1-2/+2
2012-09-24Address one of the original FIXMEs for the new SROA pass by implementingtstellar1-20/+43
2012-09-24Emit dtors into proper section while compiling in vcpp-compatible mode.tstellar1-6/+17
2012-09-24Switch to a signed representation for the dynamic offsets while walkingtstellar1-0/+58
2012-09-24Don't do actual work inside an assert statement. Fixes PR11760!tstellar3-0/+3
2012-09-24Revise test to avoid using of 'grep'tstellar1-20/+14
2012-09-24Enhance test case of atomic16 to verify inst encoding fixed in r164453.tstellar1-0/+6
2012-09-24Fix edge cases of ARM shift operands in arith instructions.tstellar2-0/+88
2012-09-24Fix the handling of edge cases in ARM shifted operands.tstellar2-0/+116
2012-09-24Fix a case where the new SROA pass failed to zap dead operands totstellar1-7/+11
2012-09-24LoopIdiom: Give up when the loop is not in canonical form.tstellar1-0/+34
2012-09-24[fast-isel] Fallback to SelectionDAG isel if we require strict alignment fortstellar1-0/+36
2012-09-21Revert "XXX: Update pow test" This WIP commit was accidently pulled.tstellar1-2/+2
2012-09-21XXX: Update pow testTom Stellard1-2/+2
2012-09-21test/CodeGen/R600: Add checks for register operandsTom Stellard13-15/+15
2012-09-21test/CodeGen/R600: Add some basic testsTom Stellard14-0/+227
2012-09-21InstCombine: Make sure we use the pre-zext type when creating a constant of a...d0k1-0/+14
2012-09-21BitcodeReader: Correctly insert blockaddress constant referring to a already ...d0k1-0/+15
2012-09-21Fix SymbolRef::getAddress implementation for ELF. The 'value' field in symbol...samsonov2-9/+25
2012-09-21llvm/test/CodeGen/X86/pr5145.ll: Tweak expressions to match for darwin target.chapuni1-8/+8
2012-09-21Add missing i8 max/min/umax/umin supporthliao2-1/+35
2012-09-21llvm/test/CodeGen/ARM/fast-isel.ll: Fix possible typos, s/@unaligned_i16_stor...chapuni1-2/+2
2012-09-21Testcase does not need to be this strict.mcrosier1-1/+1
2012-09-21Add newline.mcrosier1-1/+1
2012-09-21[fast-isel] Fallback to SelectionDAG isel if we require strict alignment formcrosier1-0/+30
2012-09-21ARM: Use a dedicated intrinsic for vector bitwise select.grosbach1-0/+49
2012-09-20Ignore PHI-defs for -new-coalescer interference checks.stoklund1-0/+48
2012-09-20Only emit DW_AT_object_pointer if this is a definition.echristo1-2/+2
2012-09-20SimplifyCFG: sink common codes from IF, ELSE blocks down to END block.mren1-0/+53
2012-09-20Try to make these tests more portable.evancheng3-7/+7
2012-09-20Fix broken check lines.d0k1-3/+3
2012-09-20Specify cpu to get the correct instruction ordering. Remove XFAIL.rdivacky1-6/+1
2012-09-20Specify CPu to prevent failure on ATOM due to different code schedulinghliao1-1/+1
2012-09-20Re-work X86 code generation of atomic ops with spin-loophliao8-13/+1201
2012-09-19Resolve conflicts involving dead vector lanes for -new-coalescer.stoklund1-0/+27
2012-09-19Add support for macro parameters/arguments delimited by spaces,pgurd2-8/+50
2012-09-19Support default parameters/arguments for assembler macros.pgurd1-2/+10
2012-09-19Enhance unmatched '.endr' directive error message in assembler.pgurd1-1/+1
2012-09-19Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArithhliao1-1/+2
2012-09-19Really XFAIL test/CodeGen/PowerPC/structsinregs.ll.jrose1-1/+1
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