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AgeCommit message (Expand)AuthorFilesLines
2013-12-19Un-revert: the buildbot failure in LLVM on lld-x86_64-win7 had me withKevin Enderby1-0/+16
2013-12-19Revert my change to the X86 assembler for intel syntax to work withKevin Enderby1-16/+0
2013-12-19Changed the X86 assembler for intel syntax to work with directional labels.Kevin Enderby1-0/+16
2013-12-13Grow the stackmap/patchpoint format to hold 64-bit IDs.Andrew Trick1-17/+17
2013-12-04[Stackmap] Specify the triple and cpu to fix the unit test.Juergen Ributzka1-1/+1
2013-12-04[Stackmap] Emit multi-byte nops for X86.Juergen Ributzka1-0/+47
2013-11-25Use -triple to fix the test on non-ELF hosts.Rafael Espindola1-16/+16
2013-11-25Don't use nopl in cpus that don't support it.Rafael Espindola1-2/+25
2013-11-08X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable()Jim Grosbach1-0/+73
2013-10-14Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instru...Craig Topper3-13/+13
2013-10-14Mark MOVMSKPS/MOVMSKPD/VPINSRWrr64i as AsmParserOnly to remove them from the ...Craig Topper1-0/+8
2013-10-10Allow non-AVX form of pmovmskb to take a GR64 operand.Craig Topper1-0/+4
2013-10-08Remove some instructions that existed to provide aliases to the assembler. Ca...Craig Topper2-3/+16
2013-10-07Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to registe...Craig Topper1-0/+56
2013-10-03Add XOP disassembler support. Fixes PR13933.Craig Topper1-1/+1
2013-09-29Revert accidental commit.Craig Topper1-1/+41
2013-09-29Change type of XOP flag in code emitters to a bool. Remove a some unneeded ca...Craig Topper1-41/+1
2013-09-27Adding intrinsics to the llvm backend for TBM instruction set.Yunzhong Gao1-0/+196
2013-09-27Fixing Intel format of the vshufpd instruction.Yunzhong Gao1-0/+2
2013-09-14Add the remaining Intel SHA instructionsBen Langmuir1-0/+52
2013-09-12Partial support for Intel SHA Extensions (sha1rnds4)Ben Langmuir1-0/+8
2013-09-12AVX-512: implemented extractelement with variable index.Elena Demikhovsky1-1/+9
2013-08-27[ms-inline asm] Support offsets after segment registersDavid Majnemer1-0/+6
2013-08-21AVX-512: Added SHIFT instructions.Elena Demikhovsky1-0/+16
2013-08-16[tests] Cleanup initialization of test suffixes.Daniel Dunbar2-4/+0
2013-08-01EVEX and compressed displacement encoding for AVX512Elena Demikhovsky1-0/+21
2013-07-26Add test cases for the various instruction alias and Intel syntax fixes that ...Craig Topper3-17/+380
2013-07-23Don't let x86 asm printer use the no operand movsd alias. It should use the n...Craig Topper2-11/+11
2013-07-22Fix the move to/from accumulator register instructions that use a full 64-bitKevin Enderby1-0/+32
2013-07-22Recommit r186813: More Intel syntax alias fixes. With the addition of suppres...Craig Topper1-15/+15
2013-07-03Prefix failing commands with not to make clear they are expected to fail.Rafael Espindola6-6/+6
2013-06-18Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit1-0/+9
2013-06-13X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer1-0/+29
2013-05-10[ms-inline asm] Fix a crasher when we fail on a direct match.Chad Rosier1-0/+3
2013-05-09[x86AsmParser] It's valid to stop parsing an operand at an immediate.Chad Rosier1-0/+2
2013-04-22Add test case for PR15779, which has previously been fixed.Chad Rosier1-1/+2
2013-04-18[ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier1-0/+30
2013-04-17[ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier1-1/+8
2013-04-11Add CLAC/STAC instruction encoding/decoding supportMichael Liao1-0/+8
2013-04-05[ms-inline asm] Add support for numeric displacement expressions in bracketedChad Rosier1-1/+38
2013-03-28Add support of RDSEED defined in AVX2 extensionMichael Liao1-0/+49
2013-03-28Move test since it depends on the X86 backend.Rafael Espindola1-0/+11
2013-03-27[ms-inline asm] Add support of imm displacement before bracketed memoryChad Rosier1-0/+20
2013-03-25x86 -- add the XTEST instructionDave Zarzycki1-0/+4
2013-03-18Post process ADC/SBB and use a shorter encoding if they use a sign extended i...Craig Topper1-0/+14
2013-03-18Refactor some duplicated code into helper functions.Craig Topper1-0/+7
2013-03-14Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ...Craig Topper1-0/+4
2013-03-05Fixes a test by replacing .align by .p2align and setting triples explicitly.Eli Bendersky1-2/+5
2013-03-05Add a test that .align directives on capable processors use long NOPs.David Sehr1-0/+12
2013-03-05The current X86 NOP padding uses one long NOP followed by the remainder inDavid Sehr1-0/+27
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