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2014-05-14ARM: implement support for the UDF mnemonicSaleem Abdulrasool6-0/+98
The UDF instruction is a reserved undefined instruction space. The assembler mnemonic was introduced with ARM ARM rev C.a. The instruction is not predicated and the immediate constant is ignored by the CPU. Add support for the three encodings for this instruction. The changes to the invalid instruction test is due to the fact that the invalid instructions actually overlap with the undefined instruction. Introduction of the new instruction results in a partial decode as an undefined sequence. Drop the tests as they are invalid instruction patterns anyways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208751 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-13ARM: Additional test files for thumb fixups (checked with llvm-mv ↵Christian Pirker4-44/+32
-show-encoding) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208712 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-13ARM: Additional test files for thumb fixupsChristian Pirker3-0/+36
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208691 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-08test: fix silly typoSaleem Abdulrasool1-1/+1
Oh silly Darwin and your case insensitive file system. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208274 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-08ARM: support FK_SecRel_2 relocations on WoASaleem Abdulrasool1-14/+24
This adds FK_SecRel_2 relocation support to ARM. This enables the building of object files for armv7-windows-msvc which enables CodeView line tables for debugging as opposed to armv7-windows-itanium which currently uses DWARF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208273 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-06ARM: For thumb fixups store halfwords high first and low secondChristian Pirker1-0/+12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208076 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-05Fix spelling.Joerg Sonnenberger1-0/+0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207982 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-04MC: support FK_SecRel_4 for Windows on ARMSaleem Abdulrasool1-0/+41
Add handling for FK_SecRel_4 (4-byte section relative relocations). These are used by the generation of DWARF debug information (the abbrevations use section relative relocations). This will also be used in generation of CodeView line tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207941 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-02MC: place .file records into the correct sectionSaleem Abdulrasool1-0/+30
.file records are supposed to have a section identifier of 65534 (IMAGE_SCN_DEBUG) rather than 0. This is spelt out clearly within the PE/COFF specification. Fix this minor oversight with the implementation for support for .file records. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207851 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-01Don't force symbols to be globals in .thumb_set.Rafael Espindola1-15/+10
We currently force symbols to be globals in .thumb_set. The intent seems to be that given .thumb_set foo, bar we emit an undefined symbol to bar if it is never defined. The side effect is that we mark bar as global, even if it is defined, which gas does not. Producing an undefined reference to bar is a general difference from MC and gas. For example, given a = b gas will produce an undefined reference to b, MC will not. I would be surprised if any code depends on this, but it it does, we should fix the general difference, not special case .thumb_set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-01Correction to assert statemtent to allow 32-bit unsigned numbers with the ↵Richard Barton1-0/+7
top bit set. This fixes an ARM assembler crash - regression test added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207747 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30ARM: print COFF function header for Windows on ARMSaleem Abdulrasool1-0/+45
Emit the COFF header when printing out the function. This is important as the header contains two important pieces of information: the storage class for the symbol and the symbol type information. This bit of information is required for the linker to correctly identify the type of symbol that it is dealing with. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207613 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29Parse and create GOT_PREL relocations.Joerg Sonnenberger1-0/+6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207526 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29Centralize the handling of the thumb bit.Rafael Espindola1-0/+15
This patch centralizes the handling of the thumb bit around MCStreamer::isThumbFunc and makes isThumbFunc handle aliases. This fixes a corner case, but the main advantage is having just one way to check if a MCSymbol is thumb or not. This should still be refactored to be ARM only, but at least now it is just one predicate that has to be refactored instead of 3 (isThumbFunc, ELF_Other_ThumbFunc, and SF_ThumbFunc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27Add emitThumbSet to the arm target streamer.Rafael Espindola1-0/+5
This fixes the asm printer implementation and lets the parser be unaware of what .thumb_set is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27MC: duplicate .file test for WoA (SVN r207341)Saleem Abdulrasool1-0/+17
Since the COFF tests are dependent on X86, duplicate the test for ARM. Use the default check prefix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207365 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27COFF: move ARM COFF test to ARM directorySaleem Abdulrasool1-0/+101
The COFF tests all assume X86. Just move the new COFF tests under ARM to appease the build bots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24Fix for PR18921, "vmov" part.Stepan Dyatkovskiy3-0/+103
Added support for bytes replication feature, so it could be GAS compatible. E.g. instructions below: "vmov.i32 d0, 0xffffffff" "vmvn.i32 d0, 0xabababab" "vmov.i32 d0, 0xabababab" "vmov.i16 d0, 0xabab" are incorrect, but we could deal with such cases. For first one we should emit: "vmov.i8 d0, 0xff" For second one ("vmvn"): "vmov.i8 d0, 0x54" For last two instructions it should emit: "vmov.i8 d0, 0xab" P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code. Just for keeping method bodies in harmony with themselves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207080 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22Follow aliases when determining if a symbol is thumb.Rafael Espindola1-1/+11
This fixes pr19484. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-18Change the ARM assembler to require a :lower16: or :upper16 on non-constantKevin Enderby4-7/+26
expressions for mov instructions instead of silently truncating by default. For the ARM assembler, we want to avoid misleadingly allowing something like "mov r0, <symbol>" especially when we turn it into a movw and the expression <symbol> does not have a :lower16: or :upper16" as part of the expression. We don't want the behavior of silently truncating, which can be unexpected and lead to bugs that are difficult to find since this is an easy mistake to make. This does change the previous behavior of llvm but actually matches an older gnu assembler that would not allow this but print less useful errors of like “invalid constant (0x927c0) after fixup” and “unsupported relocation on symbol foo”. The error for llvm is "immediate expression for mov requires :lower16: or :upper16" with correct location information on the operand as shown in the added test cases. rdar://12342160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16Test commit - Added a new lineKonrad Anheim1-0/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15[MC] Emit an error if cfi_startproc is used before a symbol is defined.Quentin Colombet1-0/+1
Currently, we bind those directives with the last symbol, so if none has been defined, this would lead to a crash of the compiler. <rdar://problem/15939159> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206236 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11Don't lose the thumb bit by using relocations with sections.Rafael Espindola1-1/+12
This fixes a regression from r205076. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206047 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10Remove the use of "%e" as it is not a valid expansion like "%t".Kaelyn Takata1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10For the ARM integrated assembler add checking of theKevin Enderby1-0/+8354
alignments on vld/vst instructions. And report errors for alignments that are not supported. While this is a large diff and an big test case, the changes are very straight forward. But pretty much had to touch all vld/vst instructions changing the addrmode to one of the new ones that where added will do the proper checking for the specific instruction. FYI, re-committing this with a tweak so MemoryOp's default constructor is trivial and will work with MSVC 2012. Thanks to Reid Kleckner and Jim Grosbach for help with the tweak. rdar://11312406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10Revert "For the ARM integrated assembler add checking of the alignments on ↵Reid Kleckner1-8354/+0
vld/vst instructions. And report errors for alignments that are not supported." It doesn't build with MSVC 2012, because MSVC doesn't allow union members that have non-trivial default constructors. This change added 'SMLoc AlignmentLoc' to MemoryOp, which made MemoryOp's default ctor non-trivial. This reverts commit r205930. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205944 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09For the ARM integrated assembler add checking of theKevin Enderby1-0/+8354
alignments on vld/vst instructions. And report errors for alignments that are not supported. While this is a large diff and an big test case, the changes are very straight forward. But pretty much had to touch all vld/vst instructions changing the addrmode to one of the new ones that where added will do the proper checking for the specific instruction. rdar://11312406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205930 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-08Fix the ARM VLD3 (single 3-element structure to all lanes)Kevin Enderby1-1/+1
size 16 double-spaced registers instruction printing. This: vld3.16 {d0[], d2[], d4[]}, [r4]! was being printed as: vld3.16 {d0[], d1[], d2[]}, [r4]! rdar://16531387 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205779 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-04Fix for PR18921 (LDRD/STRD part)::Stepan Dyatkovskiy4-0/+59
Removed "GNU Assembler extension (compatibility)" definitions from ARMInstrInfo.td Fixed ARMAsmParser::ParseInstruction GNU compatability branch, so it also works for thumb mode from now. Added new tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205622 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-04Fixed register class in STRD instruction for Thumb2 mode.Stepan Dyatkovskiy2-0/+16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03ARM: update even more testsSaleem Abdulrasool2-12/+34
More updating of tests to be explicit about the target triple rather than relying on the default target triple supporting ARM mode. Indicate to lit that object emission is not yet available for Windows on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205545 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool3-7/+15
This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03PR19320:Stepan Dyatkovskiy1-0/+9
The trouble as in ARMAsmParser, in ParseInstruction method. It assumes that ARM::R12 + 1 == ARM::SP. It is wrong, since ARM::<Register> codes are generated by tablegen and actually could be any random numbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205524 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29Recommitted fix for PR18931, with extended tests set.Stepan Dyatkovskiy5-8/+32
Issue subject: Crash using integrated assembler with immediate arithmetic Fix description: Expressions like 'cmp r0, #(l1 - l2) >> 3' could not be evaluated on asm parsing stage, since it is impossible to resolve labels on this stage. In the end of stage we still have expression (MCExpr). Then, when we want to encode it, we expect it to be an immediate, but it still an expression. Patch introduces a Fixup (MCFixup instance), that is processed after main encoding stage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205094 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29Completely rewrite ELFObjectWriter::RecordRelocation.Rafael Espindola1-21/+12
I started trying to fix a small issue, but this code has seen a small fix too many. The old code was fairly convoluted. Some of the issues it had: * It failed to check if a symbol difference was in the some section when converting a relocation to pcrel. * It failed to check if the relocation was already pcrel. * The pcrel value computation was wrong in some cases (relocation-pc.s) * It was missing quiet a few cases where it should not convert symbol relocations to section relocations, leaving the backends to patch it up. * It would not propagate the fact that it had changed a relocation to pcrel, requiring a quiet nasty work around in ARM. * It was missing comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205076 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-28Add ARM big endian Target (armeb, thumbeb)Christian Pirker4-14/+77
Reviewed at http://llvm-reviews.chandlerc.com/D3095 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205007 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27Rejected r204899 and r204900 due to remaining test failures on ↵Stepan Dyatkovskiy1-9/+0
cmake-llvm-x86_64-linux buildbot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204901 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27Fixed test for r204899 (pr18931 fix)Stepan Dyatkovskiy1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27Fix for pr18931: Crash using integrated assembler with immediate arithmeticStepan Dyatkovskiy1-0/+9
Fix description: Expressions like 'cmp r0, #(l1 - l2) >> 3' could not be evaluated on asm parsing stage, since it is impossible to resolve labels on this stage. In the end of stage we still have expression (MCExpr). Then, when we want to encode it, we expect it to be an immediate, but it still an expression. Patch introduces a Fixup (MCFixup instance), that is processed after main encoding stage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27ARM: raise error message when complex SO expressions can't really beJiangning Liu1-0/+8
solved as a constant at compilation time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204898 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26Fix the ARM VST4 (single 4-element structure from one lane)Kevin Enderby1-1/+1
size 16 double-spaced registers instruction printing. This: vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7]! was being printed as: vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! rdar://16435096 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24Teach llvm-readobj to print human friendly description of reserved sections.Rafael Espindola1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-22ARM IAS: properly handle function entries in .thumbSaleem Abdulrasool2-2/+83
When a label is parsed, check if there is type information available for the label. If so, check if the symbol is a function. If the symbol is a function and we are in thumb mode and no explicit thumb_func has been emitted, adjust the symbol data to indicate that the function definition is a thumb function. The application of this inferencing is improved value handling in the object file (the required thumb bit is set on symbols which are thumb functions). It also helps improve compatibility with binutils. The one complication that arises from this handling is the MCAsmStreamer. The default implementation of getOrCreateSymbolData in MCStreamer does not support tracking the symbol data. In order to support the semantics of thumb functions, track symbol data in assembly streamer. Although O(n) in number of labels in the TU, this is already done in various other streamers and as such the memory overhead is not a practical concern in this scenario. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21This reverts commit r203762, "ARM: support emission of complex SO expressions".Jiangning Liu1-9/+0
The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20llvm-objdump output hex to match binutils' objdumpGreg Fitzgerald2-26/+26
Patch by Ted Woodward git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20Reapply 'ARM IAS: support .thumb_set'Saleem Abdulrasool2-0/+183
Re-apply the change after it was reverted to do conflicts due to another change being reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204306 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19Revert "Add back r203962, r204028 and r204059."Rafael Espindola2-183/+0
This reverts commit r204178. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18Add back r203962, r204028 and r204059.Rafael Espindola2-0/+183
This reverts commit r204137. This includes a fix for handling aliases of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204178 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18Revert r203962 and two revisions depending on it: r204028 and r204059.Alexander Kornienko2-183/+0
The revision I'm reverting breaks handling of transitive aliases. This blocks us and breaks sanitizer bootstrap: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2651 (and checked locally by Alexey). This revision is the result of: svn merge -r204059:204058 -r204028:204027 -r203962:203961 . + the regression test added to test/MC/ELF/alias.s Another way to reproduce the regression with clang: $ cat q.c void a1(); void a2() __attribute__((alias("a1"))); void a3() __attribute__((alias("a2"))); void a1() {} $ ~/work/llvm-build/bin/clang-3.5-good -c q.c && mv q.o good.o && \ ~/work/llvm-build/bin/clang-3.5-bad -c q.c && mv q.o bad.o && \ objdump -t good.o bad.o good.o: file format elf64-x86-64 SYMBOL TABLE: 0000000000000000 l df *ABS* 0000000000000000 q.c 0000000000000000 l d .text 0000000000000000 .text 0000000000000000 l d .data 0000000000000000 .data 0000000000000000 l d .bss 0000000000000000 .bss 0000000000000000 l d .comment 0000000000000000 .comment 0000000000000000 l d .note.GNU-stack 0000000000000000 .note.GNU-stack 0000000000000000 l d .eh_frame 0000000000000000 .eh_frame 0000000000000000 g F .text 0000000000000006 a1 0000000000000000 g F .text 0000000000000006 a2 0000000000000000 g F .text 0000000000000006 a3 bad.o: file format elf64-x86-64 SYMBOL TABLE: 0000000000000000 l df *ABS* 0000000000000000 q.c 0000000000000000 l d .text 0000000000000000 .text 0000000000000000 l d .data 0000000000000000 .data 0000000000000000 l d .bss 0000000000000000 .bss 0000000000000000 l d .comment 0000000000000000 .comment 0000000000000000 l d .note.GNU-stack 0000000000000000 .note.GNU-stack 0000000000000000 l d .eh_frame 0000000000000000 .eh_frame 0000000000000000 g F .text 0000000000000006 a1 0000000000000000 g F .text 0000000000000006 a2 0000000000000000 g .text 0000000000000000 a3 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204137 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17ARM IAS: support .thumb_setSaleem Abdulrasool2-0/+183
This performs the equivalent of a .set directive in that it creates a symbol which is an alias for another symbol or value which may possibly be yet undefined. This directive also has the added property in that it marks the aliased symbol as being a thumb function entry point, in the same way that the .thumb_func directive does. The current implementation fails one test due to an unrelated issue. Functions within .thumb sections are not marked as thumb_func. The result is that the aliasee function is not valued correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204059 91177308-0d34-0410-b5e6-96231b3b80d8
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