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2011-08-31Update more tests to the new EH scheme.Bill Wendling1-0/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06Run codegen dce pass for all targets at all optimization levels. Previously it'sEvan Cheng1-1/+0
only run for x86 with fastisel. I've found it being very effective in eliminating some obvious dead code as result of formal parameter lowering especially when tail call optimization eliminated the need for some of the loads from fixed frame objects. It also shrinks a number of the tests. A couple of tests no longer make sense and are now eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11Follow up to 81494. When the folded reload is narrowed to a 32-bit load then ↵Evan Cheng1-1/+1
change the destination register to a 32-bit one or add a sub-register index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11It's not legal to fold a load from a narrower stack slot into a wider ↵Evan Cheng1-0/+48
instruction. If done, the instruction does a 64-bit load and that's not safe. This can happen we a subreg_to_reg 0 has been coalesced. One exception is when the instruction that folds the load is a move, then we can simply turn it into a 32-bit load from the stack slot. rdar://7170444 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81494 91177308-0d34-0410-b5e6-96231b3b80d8