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path: root/test/CodeGen/Hexagon
AgeCommit message (Expand)AuthorFilesLines
2014-05-14DebugInfo: Sure up subprogram variable list handling with more assertions and...David Blaikie1-2/+1
2014-02-16Fix broken CHECK linesNico Rieck1-1/+1
2014-02-04DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emi...David Blaikie1-2/+3
2013-11-22Debug Info: update testing cases to specify the debug info version number.Manman Ren1-0/+2
2013-09-30TBAA: remove !tbaa from testing cases when they are not needed.Manman Ren2-10/+3
2013-09-09Debug Info Testing: use null instead of an empty string in context field.Manman Ren1-1/+1
2013-09-06Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields.Manman Ren1-1/+1
2013-08-26Debug Info: add an identifier field to DICompositeType.Manman Ren1-1/+1
2013-08-21TBAA: remove !tbaa from testing cases when they are not needed.Manman Ren2-267/+257
2013-08-16[tests] Cleanup initialization of test suffixes.Daniel Dunbar1-2/+0
2013-08-06Refactor isInTailCallPosition handlingTim Northover1-0/+28
2013-07-27Debug Info Verifier: verify SPs in llvm.dbg.sp.Manman Ren1-9/+10
2013-07-25Debug Info: improve the verifier to check field types.Manman Ren1-2/+2
2013-07-24Debug Info: improve the Finder.Manman Ren1-1/+1
2013-07-13Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging....Stephen Lin7-7/+7
2013-05-14Hexagon: Pass to replace tranfer/copy instructions into combine instructionJyotsna Verma2-6/+38
2013-05-14Hexagon: Add patterns to generate 'combine' instructions.Jyotsna Verma1-0/+80
2013-05-14Hexagon: ArePredicatesComplement should not restrict itself to TFRs.Jyotsna Verma1-0/+32
2013-05-14Hexagon: Test case to check if branch probabilities are properly reflected inJyotsna Verma1-0/+79
2013-05-10Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.Jyotsna Verma1-0/+28
2013-05-09Hexagon: Use relation map for getMatchingCondBranchOpcode() and Jyotsna Verma1-0/+30
2013-05-07Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma1-0/+26
2013-05-07Reverting r181331.Jyotsna Verma1-26/+0
2013-05-07Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma1-0/+26
2013-05-02Hexagon - Add peephole optimizations for zero extends.Pranav Bhandarkar2-6/+24
2013-04-30TBAA: remove !tbaa from testing cases if not used.Manman Ren6-40/+19
2013-04-23Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.Jyotsna Verma1-0/+45
2013-04-23Hexagon: Remove assembler mapped instruction definitions.Jyotsna Verma1-0/+87
2013-04-23Hexagon: Remove duplicate instructions to handle global/immediate valuesJyotsna Verma1-0/+18
2013-03-28Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.Jyotsna Verma1-1/+0
2013-03-28Hexagon: Use multiclass for gp-relative instructions.Jyotsna Verma1-0/+33
2013-03-26Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.Jyotsna Verma1-0/+21
2013-03-22Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and w...Jyotsna Verma4-0/+1465
2013-03-14Hexagon: Removed asserts regarding alignment and offset.Jyotsna Verma1-0/+16
2013-03-08Hexagon: Add patterns for zero extended loads from i1->i64.Jyotsna Verma1-0/+25
2013-03-07Hexagon: Handle i8, i16 and i1 Var Args.Jyotsna Verma3-0/+124
2013-03-07Hexagon: Add support to lower block address.Jyotsna Verma2-0/+78
2013-03-05reverting patch 176508.Jyotsna Verma2-78/+0
2013-03-05Hexagon: Add support for lowering block address.Jyotsna Verma2-0/+78
2013-03-05Hexagon: Expand addc, adde, subc and sube.Jyotsna Verma2-0/+63
2013-03-05Hexagon: Add encoding bits to the TFR64 instructions.Jyotsna Verma2-5/+5
2013-03-01Hexagon: Add constant extender support framework.Jyotsna Verma2-0/+61
2013-02-21Hexagon: Expand cttz, ctlz, and ctpop for now.Anshuman Dasgupta1-0/+34
2013-02-20Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.Jyotsna Verma2-2/+59
2013-02-13Hexagon: add support for predicate-GPR copies.Anshuman Dasgupta1-0/+8
2013-02-13Hexagon: Use absolute addressing mode loads/stores for global+offset Jyotsna Verma2-0/+86
2013-02-12Hexagon: Add support to generate predicated absolute addressing modeJyotsna Verma1-0/+19
2013-02-11Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek7-0/+1528
2013-02-05Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handleJyotsna Verma3-0/+322
2013-02-05Hexagon: Add testcase for post-increment store instructions.Jyotsna Verma1-0/+29
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