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path: root/test/CodeGen/ARM/fabss.ll
AgeCommit message (Expand)AuthorFilesLines
2011-08-09Inflate register classes after coalescing.Jakob Stoklund Olesen1-1/+3
2011-04-19Avoid write-after-write issue hazards for Cortex-A9.Bob Wilson1-1/+1
2010-10-28Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.Evan Cheng1-1/+1
2010-10-28Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ...Evan Cheng1-1/+1
2010-10-28- Assign load / store with shifter op address modes the right itinerary classes.Evan Cheng1-1/+1
2010-05-21Change ARM scheduling default to list-hybrid if the target supports floating ...Evan Cheng1-1/+1
2010-03-25switch the flag for using NEON for SP floating point to a subtarget 'feature'.Jim Grosbach1-2/+1
2009-11-22Convert ARM tests to FileCheck for PR5307.Edward O'Callaghan1-5/+18
2009-11-09Use Unified Assembly Syntax for the ARM backend.Jim Grosbach1-3/+3
2009-10-01Remove neonfp attribute and instead set default based on CPU string. Add -arm...David Goodwin1-2/+2
2009-09-09Eliminate more uses of llvm-as and llvm-dis.Dan Gohman1-5/+5
2009-08-07Make NEON single-precision FP support the default for cortex-a8 (again).David Goodwin1-0/+2
2009-08-04Add NEON single-precision FP support for fabs and fneg.David Goodwin1-0/+13