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2005-04-14Add the necessary support to codegen condition register logical ops withNate Begeman4-17/+72
2005-04-13Start allocating condition registers. Almost all explicit uses of CR0 areNate Begeman1-23/+26
2005-04-13Implement the fold shift X, zext(Y) -> shift X, Y at the target level,Nate Begeman1-6/+22
2005-04-13Disbale the broken fold of shift + sz[ext] for nowNate Begeman2-26/+30
2005-04-13fix an infinite loopChris Lattner1-1/+1
2005-04-13fix some serious miscompiles on ia64, alpha, and ppcChris Lattner1-1/+1
2005-04-13avoid work when possible, perhaps fix the problem nate and andrew are seeingChris Lattner1-0/+1
2005-04-13WOW, function calls still seem to work after this.Andrew Lenharth3-19/+30
2005-04-13prepare for func call optimizationAndrew Lenharth1-1/+1
2005-04-13* add the shladd instructionDuraid Madina2-0/+23
2005-04-13add matches for SxADDL and company, as well as simplify the SxADDQ codeAndrew Lenharth1-78/+48
2005-04-13Implement expansion of unsigned i64 -> FP.Chris Lattner1-2/+31
2005-04-13* if ANDing with a constant of the form:Duraid Madina1-2/+45
2005-04-13added all flavors of zap for andingAndrew Lenharth1-0/+20
2005-04-13Make expansion of uint->fp cast assert out instead of infinitely recurse.Chris Lattner1-1/+1
2005-04-13Fix some mysteriously missing {}'s which cause the miscompilation ofChris Lattner1-2/+2
2005-04-13add back the optimization that Nate added for shl X, (zext_inreg y)Chris Lattner1-2/+23
2005-04-13Oops, remove these too.Chris Lattner1-6/+2
2005-04-13remove one more occurance of this that snuck inChris Lattner1-1/+1
2005-04-13Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuffChris Lattner1-21/+0
2005-04-13Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causingChris Lattner1-17/+0
2005-04-13Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emitChris Lattner2-25/+0
2005-04-13Z_E_I is goneChris Lattner1-2/+0
2005-04-13Instead of making ZERO_EXTEND_INREG nodes, use the helper method inChris Lattner1-31/+22
2005-04-13Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodesChris Lattner1-41/+46
2005-04-12Fold shift x, [sz]ext(y) -> shift x, yNate Begeman1-0/+16
2005-04-12Fold shift by size larger than type size to undefNate Begeman3-20/+5
2005-04-12Implement setcc op, -1 sequencesNate Begeman1-22/+41
2005-04-12promote extload i1 -> extload i8Chris Lattner1-2/+10
2005-04-12add an argument to allow avoiding deleting phi nodes.Chris Lattner1-6/+9
2005-04-12Get rid of this for_each loopChris Lattner1-2/+2
2005-04-12* OK, after changing to use liveIn/liveOut instead of IDEFs,Duraid Madina2-5/+18
2005-04-12Get rid of idefs for arguments (oops)Andrew Lenharth1-5/+5
2005-04-12Get rid of idefs for argumentsAndrew Lenharth1-5/+28
2005-04-12Put out* into the allocation order, allowing the register allocator toChris Lattner1-4/+3
2005-04-12Make sure to realize that calls use their argument regsChris Lattner1-0/+1
2005-04-12stop emitting IDEFs for args - change to using liveIn/liveOutDuraid Madina2-4/+31
2005-04-12Initial support for allocation condition registersNate Begeman5-13/+67
2005-04-12Fix a crash analyzing MultiSource/Benchmarks/MallocBench/gsChris Lattner1-2/+1
2005-04-12Remove some redundant checks, add a couple of new ones. This allows us toChris Lattner1-7/+5
2005-04-12Emit comparisons against the sign bit better. Codegen this:Chris Lattner1-0/+10
2005-04-12Emit long comparison against -1 better. Instead of this (x86):Chris Lattner1-0/+10
2005-04-12canonicalize x <u 1 -> x == 0. On this testcase:Chris Lattner1-0/+9
2005-04-12Implement bitfield clearsNate Begeman2-11/+35
2005-04-11Update PPC readme. Remove things that are done or aren't ppc specificNate Begeman1-6/+2
2005-04-11Teach the dag mechanism that this:Chris Lattner1-2/+21
2005-04-11Fix expansion of shifts by exactly NVT bits on arch's (like X86) that haveChris Lattner1-0/+10
2005-04-11IA64 supports this operation.Chris Lattner1-1/+0
2005-04-11ORo sets CR0Chris Lattner1-0/+1
2005-04-11Revert the previous patch, which I didn't mean to check in.Chris Lattner2-37/+26