summaryrefslogtreecommitdiff
path: root/lib
AgeCommit message (Collapse)AuthorFilesLines
2013-04-18Cleanup patch:Bill Wendling2-59/+59
Semantics of parameters named Index and Idx were inconsistent between "include/llvm/IR/Attributes.h", "lib/IR/AttributeImpl.h" and "lib/IR/Attributes.cpp": sometimes these were fixed 1-based indexes of IR parameters (or AttributeSet::ReturnIndex for IR return values or AttributeSet::FunctionIndex for IR functions), other times they were the internal slot for storage in the underlying AttributeSetImpl. I renamed usage of the former to "Index" and usage of the latter to "Slot" ("Slot" was already being used consistently for the latter in a subset of cases) Patch by Stephen Lin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179791 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18This patch addresses two cleanup issues:Bill Wendling2-108/+71
1. Verify::VerifyParameterAttrs in "lib/IR/Verifier.cpp" and AttrBuilder::removeFunctionOnlyAttrs in "lib/IR/Attributes.cpp" (only called by Verify::VerifyFunctionAttrs) separately maintained a list of function-only attribute types. I've consolidated the logic into a new function used for both cases in "lib/IR/Verifier.cpp", so this logic is in one place (other than the AsmParser front-end) 2. Various functions in "lib/IR/Verifier.cpp" passed AttributeSet around by reference needlessly, as it's just a handle to an immutable pimpl body. Patch by Stephen Lin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179790 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Fix a -Wdocumentation warningDmitri Gribenko1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179789 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18In the function InstCombiner::visitExtractElementInst() removed the ↵Anat Shemer1-4/+4
limitation that extract is promoted over a cast only if the cast has only one use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179786 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18C API: Fix coding styleTom Stellard1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179785 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Added a function scalarizePHI() that sclarizes a vector phi instruction if ↵Anat Shemer2-0/+78
it has only 2 uses: one to promote the vector phi in a loop and the other use is an extract operation of one element at a constant location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Fix comment. Patch by Stephen Lin.Bill Wendling1-2/+3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179780 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18At Jim Grosbach's request detemplate Object/MachO.h.Rafael Espindola1-82/+1379
We are still able to handle mixed endian objects by swapping one struct at a time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179778 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Fix a comment, PR15777.Chris Lattner1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179775 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Allow misaligned stores in x86 fast-isel.Derek Schuff1-5/+0
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes no such requirement. There doesn't appear to be an x86 architectural correctness issue with allowing potentially unaligned store instructions. This patch removes this restriction. Patch by Jim Stichnot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18LoopVectorizer: Recognize min/max reductionsArnold Schwaighofer1-34/+209
A min/max operation is represented by a select(cmp(lt/le/gt/ge, X, Y), X, Y) sequence in LLVM. If we see such a sequence we can treat it just as any other commutative binary instruction and reduce it. This appears to help bzip2 by about 1.5% on an imac12,2. radar://12960601 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179773 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[ms-inline asm] Simplify some logic and add a FIXME for unhandled unary minus.Chad Rosier1-10/+13
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179765 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Make this private method.Chad Rosier1-4/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18LoopVectorize: Use a set to avoid longer cycles in the reduction chain too.Benjamin Kramer1-8/+6
Fixes PR15748. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179757 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Fix for PR14824, An ARM Load/Store Optimization bugHao Liu1-1/+17
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179751 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Revert "Combine bit test + conditional or into simple math"David Majnemer1-61/+0
It is causing stage2 builds to fail, let's get them running again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179750 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Combine bit test + conditional or into simple mathDavid Majnemer1-0/+61
Simplify: (select (icmp eq (and X, C1), 0), Y, (or Y, C2)) Into: (or (shl (and X, C1), C3), y) Where: C3 = Log(C2) - Log(C1) If: C1 and C2 are both powers of two git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179748 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[objc-arc] Do not mismatch up retains inside a for loop with releases ↵Michael Gottesman1-96/+131
outside said for loop in the presense of differing provenance caused by escaping blocks. This occurs due to an alloca representing a separate ownership from the original pointer. Thus consider the following pseudo-IR: objc_retain(%a) for (...) { objc_retain(%a) %block <- %a F(%block) objc_release(%block) } objc_release(%a) From the perspective of the optimizer, the %block is a separate provenance from the original %a. Thus the optimizer pairs up the inner retain for %a and the outer release from %a, resulting in segfaults. This is fixed by noting that the signature of a mismatch of retain/releases inside the for loop is a Use/CanRelease top down with an None bottom up (since bottom up the Retain-CanRelease-Use-Release sequence is completed by the inner objc_retain, but top down due to the differing provenance from the objc_release said sequence is not completed). In said case in CheckForCFGHazards, we now clear the state of %a implying that no pairing will occur. Additionally a test case is included. rdar://12969722 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179747 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Removed trailing whitespace.Michael Gottesman1-3/+3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[mips] Rename function.Akira Hatanaka1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179741 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[mips] DSP-ASE move from HI/LO register instructions.Akira Hatanaka4-8/+99
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179739 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Mips assembler: formatting and comment changes.Jack Carter1-302/+294
This patch should not have any functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179737 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Add an option `-enable-old-style-attr-syntax' to print out function ↵Bill Wendling3-27/+33
attributes in the "old" style. It's sometimes beneficial to emit a testcase with the old style attribute syntax. Allow someone to do this. <rdar://problem/13563209> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179735 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[objc-arc] Added annotation option to only emit annotations for a specific ↵Michael Gottesman1-0/+24
ssa identifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179729 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Two small cleanups for ELF's templates.Rafael Espindola1-1/+1
* We only ever specialize these templates with an instantiation of ELFType, so we don't need a template template. * Replace LLVM_ELF_COMMA with just passing the individual parameters to the macro. This requires a second macro for when we only have ELFT, but that is still a small win. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179726 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Add support for subsections to the ELF assembler. Fixes PR8717.Peter Collingbourne20-83/+184
Differential Revision: http://llvm-reviews.chandlerc.com/D598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179725 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] These should be int64_t, not uint64_t.Chad Rosier1-6/+6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179724 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Fixed typo.Michael Gottesman1-4/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179721 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier1-72/+106
unable to handle cases such as __asm mov eax, 8*-8. This patch also attempts to simplify the state machine. Further, the error reporting has been improved. Test cases included, but more will be added to the clang side shortly. rdar://13668445 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[objc-arc] Added descriptions for EnableARCAnnotations, ↵Michael Gottesman2-3/+7
EnableCheckForCFGHazards, EnableARCOptimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[objc-arc] Added an option to arc-annotations for turning off CheckForCFGHazard.Michael Gottesman1-0/+6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky1-0/+125
for the sdiv/srem/udiv/urem bitcode instructions. This is done for the i8, i16, and i32 types, as well as i64 for the x86_64 target. Patch by Jim Stichnoth git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179715 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17X86 cost model: Exit before calling getSimpleVT on non-simple VTsArnold Schwaighofer1-0/+4
getSimpleVT can only handle simple value types. radar://13676022 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179714 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17A limit of 500 was still a bit too high for some tests.Bill Wendling1-3/+1
PR15000 has a testcase where the time to compile was bordering on 30s. When I dropped the limit value to 100, it became a much more managable 6s. The compile time seems to increase in a roughly linear fashion based on increasing the limit value. (See the runtimes below.) So, let's lower the limit to 100 so that they can get a more reasonable compile time. Limit Value Time ----------- ---- 10 0.9744s 20 1.8035s 30 2.3618s 40 2.9814s 50 3.6988s 60 4.5486s 70 4.9314s 80 5.8012s 90 6.4246s 100 7.0852s 110 7.6634s 120 8.3553s 130 9.0552s 140 9.6820s 150 9.8804s 160 10.8901s 170 10.9855s 180 12.0114s 190 12.6816s 200 13.2754s 210 13.9942s 220 13.8097s 230 14.3272s 240 15.7753s 250 15.6673s 260 16.0541s 270 16.7625s 280 17.3823s 290 18.8213s 300 18.6120s 310 20.0333s 320 19.5165s 330 20.2505s 340 20.7068s 350 21.1833s 360 22.9216s 370 22.2152s 380 23.9390s 390 23.4609s 400 24.0426s 410 24.6410s 420 26.5208s 430 27.7155s 440 26.4142s 450 28.5646s 460 27.3494s 470 29.7255s 480 29.4646s 490 30.5001s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179713 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Fix treatment of ARM unallocated hint instructions.Quentin Colombet3-4/+29
The reference manual defines only 5 permitted values for the immediate field of the "hint" instruction: 1. nop (imm == 0) 2. yield (imm == 1) 3. wfe (imm == 2) 4. wfi (imm == 3) 5. sev (imm == 4) Therefore, restrict the permitted values for the "hint" instruction to 0 through 4. Patch by Mihail Popa <Mihail.Popa@arm.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Appease a gcc warning about an overflow in a constant conversion.Bill Wendling1-1/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179703 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Don't store AttributeSet::FunctionIndex as an int.Benjamin Kramer1-1/+1
GCC complains: Core.cpp:1449:27: warning: overflow in implicit constant conversion [-Woverflow] I'm not sure if that's really a problem here, but using the enum type is better style anyways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17PowerPC: Mark some more patterns as isCodeGenOnly.Ulrich Weigand2-0/+6
A couple of recently introduced conditional branch patterns also need to be marked as isCodeGenOnly since they cannot be handled by the asm parser. No change in generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17R600: Make Export Instruction not duplicableVincent Lejeune1-1/+3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17R600: Export is emitted as a CF_NATIVE instVincent Lejeune2-14/+9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17R600: Emit used GPRs countVincent Lejeune2-8/+41
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179684 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Use StringSwitch instead of long chain of if-else. No functionality change.Alexey Samsonov1-37/+28
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179682 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Create a stub for DWARF parser unittestsAlexey Samsonov4-85/+3
Moves one DWARF-specific header to include/llvm/DebugInfo from lib/. Add a short unittest for r179095. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179678 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Fix -Werror build.Evgeniy Stepanov1-0/+2
Broken in r179657. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179669 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17PR15149/r174304 improvement - print hex for unknown dwarf language codes & ↵David Blaikie1-2/+7
add a test case CR feedback from Rafael Espindola and Paul Robinson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179664 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Do not optimise fprintf() calls if its return value is used.Peter Collingbourne1-9/+12
Differential Revision: http://llvm-reviews.chandlerc.com/D620 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179661 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Mips assembler: Enable handling of nested expressionsJack Carter2-133/+237
This patch allows the Mips assembler to parse and emit nested expressions as instruction operands. It also extends the expansion of memory instructions when an offset is given as an expression. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179657 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] Add support for parsing complex immediate expressions. TestChad Rosier1-32/+51
cases to be submitted on clang side shortly. rdar://13663768 and PR15760 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179655 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16C API: Add LLVMTargetMachineEmitToMemoryBuffer()Tom Stellard1-12/+33
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179648 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16C API: Add LLVMGetBufferSize()Tom Stellard1-0/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179647 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-24 01:12:48 +0000