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2014-05-14Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad20-106/+106
2014-05-14ARM-BE: test files for vector argument passingChristian Pirker1-1/+2
2014-05-14[ARM64-BE] Fix byte order of CIE and FDE frames for exception handlingChristian Pirker1-0/+17
2014-05-14X86: If we have an instruction that sets a flag and a zero test on the input ...Benjamin Kramer1-3/+63
2014-05-14[mips][mips64r6] Add sel.s and sel.dDaniel Sanders2-4/+52
2014-05-14ARM64: remove unneeded InstPrinter hacksTim Northover1-32/+0
2014-05-14ARM: implement support for the UDF mnemonicSaleem Abdulrasool4-2/+37
2014-05-14Fix typo in function name.Eric Christopher1-5/+5
2014-05-13R600/SI: Try to fix BFE operands when moving to VALUMatt Arsenault1-1/+1
2014-05-13Save the optimization level the subtarget was created with in aEric Christopher2-15/+14
2014-05-13ARMEB: Fix byte order of EH frame unwinding instructions, with modified test ...Christian Pirker1-4/+14
2014-05-13Revert "ARMEB: Fix byte order of EH frame unwinding instructions"Rafael Espindola1-14/+4
2014-05-13[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu...Daniel Sanders7-21/+35
2014-05-13ARMEB: Fix byte order of EH frame unwinding instructionsChristian Pirker1-4/+14
2014-05-13[mips] Free up two values in SubtargetFeatureFlag by folding the redundant Is...Daniel Sanders2-6/+5
2014-05-13[un]wrap extracted from lib/Target/Target[MachineC].cpp, lib/ExecutionEngine/...Artyom Skrobov2-25/+0
2014-05-13[ARM64] Fix the misleading diagnostic on bad extend amount of reg+reg address...Kevin Qin2-11/+8
2014-05-13Folding into CSEL when there is ZEXT between SETCC and ADDWeiming Zhao1-3/+11
2014-05-12Try to fix an SDAG dependence issue with sretReid Kleckner2-18/+23
2014-05-12Use cast<> for unchecked useMatt Arsenault1-1/+1
2014-05-12Add support bswap16 to/from memory compiling to rev16 on ARM/ThumbLouis Gerbarg2-0/+17
2014-05-12Use cast<> for unchecked useMatt Arsenault1-2/+2
2014-05-12Use range forMatt Arsenault2-6/+4
2014-05-12TableGen: use PrintMethods to print more aliasesTim Northover12-41/+86
2014-05-12AArch64/ARM64: use InstAliases for NEON logical (imm) instructions.Tim Northover2-72/+67
2014-05-12AArch64/ARM64: implement "mov $Rd, $Imm" aliases in TableGen.Tim Northover3-58/+94
2014-05-12R600: Add mul24 intrinsicsMatt Arsenault3-4/+10
2014-05-12Revert: r208582 - [mips][mips64r6] Add sel.s and sel.dDaniel Sanders2-52/+4
2014-05-12[mips][mips64r6] Add sel.s and sel.dDaniel Sanders2-4/+52
2014-05-12[mips][mips64r6] Add d?div, d?mod, d?divu, d?moduDaniel Sanders2-8/+32
2014-05-12[mips][mips64r6] Added mul/mulu/muh/muhuDaniel Sanders5-9/+115
2014-05-12Silencing an MSVC warning about not all control paths returning a value (even...Aaron Ballman1-0/+1
2014-05-12ARM64: remove dead validation code from the AsmParser.Tim Northover1-198/+0
2014-05-12ARM64: merge "extend" and "shift" addressing-mode enums.Tim Northover6-330/+241
2014-05-12Remove an always true argument.Rafael Espindola1-1/+1
2014-05-12X86: Make sure that we have SSE4.1 before we generate insertps nodes.Benjamin Kramer1-1/+1
2014-05-12[mips] Marked up instructions added in MIPS32 and tested that IAS for -mcpu=m...Daniel Sanders1-8/+8
2014-05-12Remove MCUseCFI from TargetMachine.Rafael Espindola1-1/+0
2014-05-12[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m...Daniel Sanders6-9/+23
2014-05-12[mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64Daniel Sanders7-25/+17
2014-05-12[mips] Fold FeatureSEInReg into FeatureMips32r2Daniel Sanders7-26/+20
2014-05-12[mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2Daniel Sanders7-23/+14
2014-05-12[mips] Replace FeatureFPIdx with FeatureMips4_32r2Daniel Sanders6-31/+40
2014-05-12[ARM64] Add proper bounds checking/diagnostics to logical shiftsBradley Smith3-22/+43
2014-05-12ARM: Implement big endian bit-conversion for NEON typeChristian Pirker3-56/+142
2014-05-12X86ISelLowering.cpp:LowerINTRINSIC_W_CHAIN(): Prune impossible "default:" [-W...NAKAMURA Takumi1-3/+0
2014-05-12[ARM64] Add diagnostics for bitfield extract/insert instructionsBradley Smith1-19/+54
2014-05-12[ARM64] Correct more bounds checks/diagnostics for arithmetic shift operandsBradley Smith2-10/+18
2014-05-12[ARM64] Move register/register MOV handling into tablegen and improve diagnos...Bradley Smith4-54/+26
2014-05-12Fixed compilation issueElena Demikhovsky1-0/+1