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2013-04-19[mips] First patch which adds support for micromips.Akira Hatanaka5-35/+190
2013-04-19[mips] Fix InstAlias of XOR and OR macros. Set EmitAlias flag and changeAkira Hatanaka1-2/+2
2013-04-19[ms-inline asm] Refactor the parsing of identifiers. No functional changeChad Rosier1-39/+33
2013-04-19[ms-inline asm] Remove these asserts. C++ variables that use namespaceChad Rosier1-2/+0
2013-04-19[ms-inline asm] Move this variable into the scope in which it is used.Chad Rosier1-1/+1
2013-04-19[ms-inline asm] Make this a hard error.Chad Rosier1-4/+4
2013-04-19[ms-inline asm] Cleanup the dot operator implementation.Chad Rosier1-29/+15
2013-04-19ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover1-1/+1
2013-04-19ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover1-2/+3
2013-04-19Use 'array_lengthof' as possible to avoid magic numbersMichael Liao1-23/+32
2013-04-19R600: Add pattern for the BFI_INT instructionTom Stellard3-0/+24
2013-04-19R600/SI: Use InstFlag for VOP3 modifier operandsTom Stellard2-15/+14
2013-04-19Use an enum instead of magic constants to improve readability.Bill Wendling2-16/+44
2013-04-18[ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier1-1/+1
2013-04-18Set the compact unwind encoding to 'requires EH DWARF' if we cannot generate ...Bill Wendling1-9/+9
2013-04-18Disable PPC comparison optimization by defaultHal Finkel1-0/+6
2013-04-18[asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier3-67/+74
2013-04-18Implement optimizeCompareInstr for PPCHal Finkel2-0/+312
2013-04-18X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't ava...Benjamin Kramer1-15/+40
2013-04-18Allow misaligned stores in x86 fast-isel.Derek Schuff1-5/+0
2013-04-18[ms-inline asm] Simplify some logic and add a FIXME for unhandled unary minus.Chad Rosier1-10/+13
2013-04-18Make this private method.Chad Rosier1-4/+4
2013-04-18Fix for PR14824, An ARM Load/Store Optimization bugHao Liu1-1/+17
2013-04-18[mips] Rename function.Akira Hatanaka1-2/+2
2013-04-18[mips] DSP-ASE move from HI/LO register instructions.Akira Hatanaka4-8/+99
2013-04-18Mips assembler: formatting and comment changes.Jack Carter1-302/+294
2013-04-17Add support for subsections to the ELF assembler. Fixes PR8717.Peter Collingbourne4-11/+14
2013-04-17[ms-inline asm] These should be int64_t, not uint64_t.Chad Rosier1-6/+6
2013-04-17[ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier1-72/+106
2013-04-17This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky1-0/+125
2013-04-17X86 cost model: Exit before calling getSimpleVT on non-simple VTsArnold Schwaighofer1-0/+4
2013-04-17Fix treatment of ARM unallocated hint instructions.Quentin Colombet3-4/+29
2013-04-17PowerPC: Mark some more patterns as isCodeGenOnly.Ulrich Weigand2-0/+6
2013-04-17R600: Make Export Instruction not duplicableVincent Lejeune1-1/+3
2013-04-17R600: Export is emitted as a CF_NATIVE instVincent Lejeune2-14/+9
2013-04-17R600: Emit used GPRs countVincent Lejeune2-8/+41
2013-04-17Fix -Werror build.Evgeniy Stepanov1-0/+2
2013-04-17Mips assembler: Enable handling of nested expressionsJack Carter2-133/+237
2013-04-17[ms-inline asm] Add support for parsing complex immediate expressions. TestChad Rosier1-32/+51
2013-04-16C API: Add LLVMTargetMachineEmitToMemoryBuffer()Tom Stellard1-12/+33
2013-04-16Remove unused variable from previous refactor.Chad Rosier1-3/+0
2013-04-16[ms-inline asm] Refactor. No functional change intended.Chad Rosier1-405/+419
2013-04-16[ms-inline asm] Remove some dead code.Chad Rosier1-8/+0
2013-04-16Fix build failure introduced in 179591 when assertions are disabled.Logan Chien1-0/+4
2013-04-16Implement ARM unwind opcode assembler.Logan Chien5-45/+427
2013-04-16Add 64-bit multiply and divide instructions for SPARC v9.Jakob Stoklund Olesen2-0/+42
2013-04-15ARM: Add VACLT and VACLE assembly aliases.Jim Grosbach2-0/+19
2013-04-15Mips assembler: Explicit floating point condition register recognition.Jack Carter1-0/+3
2013-04-15R600/SI: Emit config values in register value pairs.Tom Stellard2-3/+38
2013-04-15R600/SI: Emit configuration value in the .AMDGPU.config ELF sectionTom Stellard1-1/+9
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