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path: root/lib/Target/Mips/Mips16InstrInfo.td
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2014-01-23[mips][sched] Split IIStore into II_S[BHWD], II_S[WD][LR], and II_SAVEDaniel Sanders1-6/+6
2014-01-21[mips][sched] Split IILoad into II_L[BHWD], II_L[BHW]U, II_L[WD][LR], and II_...Daniel Sanders1-10/+10
2014-01-16Adjust offsets for max load instruction offsets. This is more pessimisticReed Kotler1-0/+2
2013-12-15Get rid of an superfluous tab in the .s file. This was originallyReed Kotler1-1/+1
2013-12-15Last change for mips16 prolog/epilog cleanup and optimization.Reed Kotler1-2/+4
2013-12-08Cleaning up of prologue/epilogue code for Mips16. First stepReed Kotler1-29/+15
2013-12-05Correct word hyphenationsAlp Toker1-1/+1
2013-11-29Part 1 of 3 patches that completes very long conditional branchesReed Kotler1-0/+15
2013-11-21Add, to constant islands, long jumps similar to ARM far branch.Reed Kotler1-0/+1
2013-11-15Make all the conditional Mips 16 branches get initially set for theReed Kotler1-4/+16
2013-11-12Change the default branch instruction to be the 16 bit variety for mips16.Reed Kotler1-1/+19
2013-11-05Fix r194019 as requested by Eric Christopher.Reed Kotler1-1/+9
2013-11-04Revert r194019 to r194021, "Submit the basic port of the rest of ARM constant...NAKAMURA Takumi1-9/+1
2013-11-04Submit the basic port of the rest of ARM constant islands code to Mips. Reed Kotler1-1/+9
2013-10-28Prune utf8 chars in comments.NAKAMURA Takumi1-3/+3
2013-10-28Prune trailing linefeeds.NAKAMURA Takumi1-1/+0
2013-10-27Make first substantial checkin of my port of ARM constant islands code to Mips.Reed Kotler1-3/+25
2013-10-12For Mips16, start to consolidate all forms of 32 bit literal loading so thatReed Kotler1-3/+1
2013-10-07Add Mips16 patterns for sign extend byte and sign extend halfword.Reed Kotler1-0/+30
2013-10-04Support tblockaddr for static compilation in Mips16.Reed Kotler1-1/+4
2013-09-18Fix two issues regarding Got pointer (GP) setup.Reed Kotler1-0/+9
2013-09-07[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fitAkira Hatanaka1-1/+1
2013-08-14[mips] Rename HIRegs and LORegs.Akira Hatanaka1-8/+8
2013-08-10Incorrect JAL instruction attributes caused the optimizer to make a wrongReed Kotler1-3/+0
2013-08-07Create a pattern for the "trap" instruction.Reed Kotler1-0/+15
2013-08-06[mips] Rename register classes CPURegs and CPU64Regs.Akira Hatanaka1-2/+2
2013-08-04Add the saving of S2. This is needed for some of the floating pointReed Kotler1-4/+4
2013-08-04Clean up code for Mips16 large frame handling.Reed Kotler1-4/+10
2013-08-01Add an omitted IsCall=1.Reed Kotler1-0/+1
2013-03-30[mips] Fix definitions of multiply, multiply-add/sub and divide instructions.Akira Hatanaka1-2/+2
2013-03-14[mips] Rename functions and variables to start with proper case.Akira Hatanaka1-1/+1
2013-02-25Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.Reed Kotler1-0/+2
2013-02-24 Make psuedo FEXT_T8I816_ins into a custom emitter.Reed Kotler1-0/+1
2013-02-24Make psuedo FEXT_T8I816_ins a custom inserter. It should be expandedReed Kotler1-0/+1
2013-02-23Add new base instruction def for cmpi, cmp, slt and sltu so that def/usesReed Kotler1-5/+10
2013-02-23Expand pseudos/macros for Selt. This is the last of the complexReed Kotler1-0/+1
2013-02-22Expand mips16 SelT form pseudso/macros.Reed Kotler1-0/+1
2013-02-21Expand the sel pseudo/macro. This generates basic blocks where previouslyReed Kotler1-0/+20
2013-02-20Expand pseudos/macros:Reed Kotler1-10/+40
2013-02-19Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler1-0/+32
2013-02-19Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler1-0/+27
2013-02-18Expand pseudo/macro BteqzT8SltuX16 . There is no test case becauseReed Kotler1-0/+2
2013-02-18Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler1-2/+16
2013-02-16Clean up mips16 td file in preparation for massive pseudo lowering work.Reed Kotler1-71/+68
2013-02-14Remove the form field from Mips16 instruction formats and set thingsReed Kotler1-13/+22
2013-02-13For Mips 16, add the optimization where the 16 bit form of addiu sp can be usedReed Kotler1-0/+22
2013-02-13Make jumptables work for -staticReed Kotler1-0/+2
2013-02-08Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are theReed Kotler1-0/+17
2013-02-07Make sure we call externals from libraries properly when -static.Reed Kotler1-0/+3
2013-02-07Enable jumps when in -static mode.Reed Kotler1-1/+1