| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2013-04-12 | ARM: Correct printing of pre-indexed operands. | Quentin Colombet | 2 | -9/+16 |
| 2013-02-22 | Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc... | Kristof Beyls | 1 | -2/+1 |
| 2012-12-05 | Added a option to the disassembler to print immediates as hex. | Kevin Enderby | 1 | -7/+7 |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 1 | -2/+2 |
| 2012-11-16 | Remove hard coded registers in ARM ldrexd and strexd instructions | Weiming Zhao | 2 | -0/+39 |
| 2012-10-30 | ARM: Better disassembly for pc-relative LDR. | Jim Grosbach | 2 | -3/+4 |
| 2012-10-23 | Make branch heavy code for generating marked up disassembly simpler | Kevin Enderby | 1 | -304/+142 |
| 2012-10-22 | Add support for annotated disassembly output for X86 and arm. | Kevin Enderby | 1 | -128/+486 |
| 2012-09-22 | ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable] | NAKAMURA Takumi | 1 | -0/+2 |
| 2012-09-22 | Whitespace. | NAKAMURA Takumi | 1 | -2/+2 |
| 2012-09-22 | Fix edge cases of ARM shift operands in arith instructions. | Tim Northover | 1 | -38/+6 |
| 2012-09-22 | Fix the handling of edge cases in ARM shifted operands. | Tim Northover | 1 | -8/+20 |
| 2012-08-02 | Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ... | Jiangning Liu | 1 | -12/+19 |
| 2012-08-02 | Fix #13241, a bug around shift immediate operand for ARM instruction ADR. | Jiangning Liu | 2 | -0/+20 |
| 2012-06-18 | ARM: Define generic HINT instruction. | Jim Grosbach | 1 | -0/+21 |
| 2012-06-15 | Fix the encoding of the armv7m (MClass) for MSR registers other than aspr, | Kevin Enderby | 1 | -10/+20 |
| 2012-05-17 | Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing | Kevin Enderby | 1 | -5/+23 |
| 2012-05-11 | Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o... | Silviu Baranga | 1 | -2/+6 |
| 2012-04-27 | Refactor IT handling not to store the bottom bit of the condition code in the... | Richard Barton | 1 | -1/+2 |
| 2012-04-13 | For ARM disassembly only print 32 unsigned bits for the address of branch | Kevin Enderby | 1 | -2/+2 |
| 2012-04-02 | Move getOpcodeName from the various target InstPrinters into the superclass M... | Benjamin Kramer | 2 | -5/+0 |
| 2012-04-02 | Remove getInstructionName from MCInstPrinter implementations in favor of usin... | Craig Topper | 2 | -4/+2 |
| 2012-04-02 | Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ... | Craig Topper | 2 | -3/+4 |
| 2012-03-06 | ARM more NEON VLD/VST composite physical register refactoring. | Jim Grosbach | 1 | -5/+4 |
| 2012-03-06 | ARM refactor more NEON VLD/VST instructions to use composite physregs | Jim Grosbach | 2 | -23/+11 |
| 2012-03-06 | Tidy up. Kill some dead code. | Jim Grosbach | 2 | -10/+0 |
| 2012-03-05 | ARM Refactor VLD/VST spaced pair instructions. | Jim Grosbach | 2 | -0/+11 |
| 2012-03-05 | ARM refactor away a bunch of VLD/VST pseudo instructions. | Jim Grosbach | 2 | -0/+10 |
| 2012-03-05 | Make MCRegisterInfo available to the the MCInstPrinter. | Jim Grosbach | 2 | -2/+4 |
| 2012-03-01 | Change ARMInstPrinter::printPredicateOperand() so it will not abort if it | Kevin Enderby | 1 | -1/+4 |
| 2012-02-19 | Remove dead code. Improve llvm_unreachable text. Simplify some control flow. | Ahmed Charles | 1 | -1/+0 |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 1 | -1/+1 |
| 2012-02-07 | Convert assert(0) to llvm_unreachable | Craig Topper | 1 | -2/+2 |
| 2012-01-25 | NEON VLD4(all lanes) assembly parsing and encoding. | Jim Grosbach | 2 | -1/+29 |
| 2012-01-24 | NEON VLD3(all lanes) assembly parsing and encoding. | Jim Grosbach | 2 | -0/+26 |
| 2012-01-24 | NEON VLD4(multiple 4 element structures) assembly parsing. | Jim Grosbach | 2 | -0/+14 |
| 2012-01-23 | NEON VLD3(multiple 3-element structures) assembly parsing. | Jim Grosbach | 2 | -0/+12 |
| 2011-12-22 | ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point). | Jim Grosbach | 2 | -0/+12 |
| 2011-12-21 | ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback. | Jim Grosbach | 2 | -0/+12 |
| 2011-12-19 | ARM assembly parsing and encoding support for LDRD(label). | Jim Grosbach | 1 | -0/+11 |
| 2011-12-14 | ARM NEON VST2 assembly parsing and encoding. | Jim Grosbach | 2 | -0/+12 |
| 2011-12-12 | LLVMBuild: Remove trailing newline, which irked me. | Daniel Dunbar | 1 | -1/+0 |
| 2011-11-30 | ARM parsing for VLD1 two register all lanes, no writeback. | Jim Grosbach | 2 | -0/+11 |
| 2011-11-30 | ARM parsing aliases for VLD1 single register all lanes. | Jim Grosbach | 2 | -0/+9 |
| 2011-11-29 | build/CMake: Finish removal of add_llvm_library_dependencies. | Daniel Dunbar | 1 | -5/+0 |
| 2011-11-07 | Simplify some uses of utohexstr. | Benjamin Kramer | 1 | -2/+2 |
| 2011-11-03 | build: Add initial cut at LLVMBuild.txt files. | Daniel Dunbar | 1 | -0/+24 |
| 2011-11-02 | Fix the issue that r143552 was trying to address the _right_ way. One-regist... | Owen Anderson | 1 | -2/+6 |
| 2011-10-21 | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2 | -0/+12 |
| 2011-10-21 | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2 | -0/+11 |
