summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2014-05-13Assert that we don't RAUW a Constant with a ConstantExpr that contains it.Rafael Espindola2-1/+53
We already had an assert for foo->RAUW(foo), but not for something like foo->RAUW(GEP(foo)) and would go in an infinite loop trying to apply the replacement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-13Folding into CSEL when there is ZEXT between SETCC and ADDWeiming Zhao2-3/+22
Normally, patterns like (add x, (setcc cc ...)) will be folded into (csel x, x+1, not cc). However, if there is a ZEXT after SETCC, they won't be folded. This patch recognizes the ZEXT and allows the generation of CSINC. This patch fixes bug 19680. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-13Convert test to FileCheck.Rafael Espindola1-1/+8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208658 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-13Convert test to FileCheck.Rafael Espindola1-2/+12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208644 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Revert "DebugInfo: Include lexical scopes in inlined subroutines."David Blaikie5-130/+21
This reverts commit r208506. Some inlined subroutine scopes appear to be missing with this change. Reverting while I investigate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208642 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Use a logical not when inverting SetCC. This unfortunately doesn't fire on ↵Pete Cooper3-3/+22
any targets so I couldn't find a test case to trigger it. The problem occurs when a non-i1 setcc is inverted. For example 'i8 = setcc' will get 'xor 0xff' to invert this. This is clearly wrong when the boolean contents are ZeroOrOne. This patch introduces getLogicalNOT and updates SetCC legalisation to use it. Reviewed by Hal Finkel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208641 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[DAGCombiner] Split up an indexed load if only the base pointer value is liveAdam Nemet2-7/+59
Right now the load may not get DCE'd because of the side-effect of updating the base pointer. This can happen if we lower a read-modify-write of an illegal larger type (e.g. i48) such that the modification only affects one of the subparts (the lower i32 part but not the higher i16 part). See the testcase. In order to spot the dead load we need to revisit it when SimplifyDemandedBits decided that the value of the load is masked off. This is the CommitTargetLoweringOpt piece. I checked compile time with ARM64 by sending SPEC bitcode files through llc. No measurable change. Fixes <rdar://problem/16031651> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208640 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Fix ARM bswap16.ll test on WindowsLouis Gerbarg1-2/+2
Windows on ARM only supports thumb mode execution, so we have to explicitly pick some non-Windows OS to test ARM mode codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208638 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Try to fix an SDAG dependence issue with sretReid Kleckner3-18/+41
r208453 added support for having sret on the second parameter. In that change, the code for copying sret into a virtual register was hoisted into the loop that lowers formal parameters. This caused a "Wrong topological sorting" assertion failure during scheduling when a parameter is passed in memory. This change undoes that by creating a second loop that deals with sret. I'm worried that this fix is incomplete. I don't fully understand the dependence issues. However, with this change we produce the same DAGs we used to produce, so if they are broken, they are just as broken as they have always been. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208637 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12DebugInfo: Attach DW_AT_inline to inlined subprograms at DIE-construction ↵David Blaikie1-4/+1
time rather than as a post-processing step. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[RuntimeDyld] Add support for MachO __jump_table and __pointers sections, andLang Hames8-23/+245
SECTDIFF relocations on 32-bit x86. This fixes several of the MCJIT regression test failures that show up on 32-bit builds. <rdar://problem/16886294> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208635 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12DebugInfo: Make gmlt debug info more gmlt-like by removing variables.David Blaikie1-6/+1
For some impending improvements to debug info, LLVM will start assuming that when the CU specifies llvm::DIBuilder::LineTablesOnly, the IR for functions described by that CU will not include variables, types, etc. (might be worth having some test coverage for GMLT + non-GMLT CUs, especially with non-GMLT functions inlined into GMLT CU functions) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208634 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Suggested improvement by Rafael Espindola to use isa<> in a few placesKevin Enderby1-6/+6
instead of dyn_cast<>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Use cast<> for unchecked useMatt Arsenault1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208627 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12use nullptr instead of NULLSebastian Pop1-4/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208622 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[Test] Trim unnecessary .c and .cpp from config.suffix in lit.local.cfgAdam Nemet7-7/+7
Tested by comparing make check VERBOSE=1 before and after to make sure no tests are missed. (VERBOSE=1 prints the list of tests.) Only one test :( remains where .cpp is required: tools/llvm-cov/range_based_for.cpp:// RUN: llvm-cov range_based_for.cpp | FileCheck %s --check-prefix=STDOUT The topic was discussed in this thread: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140428/214905.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Add support bswap16 to/from memory compiling to rev16 on ARM/ThumbLouis Gerbarg3-0/+59
The current patterns for REV16 misses mostn __builtin_bswap16() due to legalization promoting the operands to from load/stores toi32s and then truncing/extending them. This patch adds new patterns that catch the resultant DAGs and codegens them to rev16 instructions. Tests included. rdar://15353652 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208620 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Use cast<> for unchecked useMatt Arsenault1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208618 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Use range forMatt Arsenault2-6/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208617 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12do not assert when delinearization failsSebastian Pop2-8/+73
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208615 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12use isZero()Sebastian Pop1-6/+5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208614 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12DwarfDebug: Avoid an extra map lookup while constructing abstract scope DIEs ↵David Blaikie2-21/+21
and reduce nesting/conditionals. One test case had to be updated as it still had the extra indirection for the variable list - removing the extra indirection got it back to passing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208608 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12TableGen: use PrintMethods to print more aliasesTim Northover38-309/+464
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208607 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12AArch64/ARM64: use InstAliases for NEON logical (imm) instructions.Tim Northover2-72/+67
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208606 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12AArch64/ARM64: implement "mov $Rd, $Imm" aliases in TableGen.Tim Northover3-58/+94
This is a slightly different approach to AArch64 (the base instruction definitions aren't quite right for that to work), but achieves the same thing and reduces C++ hackery in AsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208605 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12R600: Add mul24 intrinsicsMatt Arsenault5-4/+35
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Make SimplifyDemandedBits understand BUILD_PAIRMatt Arsenault2-0/+61
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208598 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler test (test_2r_msa64) into correct folder.Matheus Almeida2-6/+3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208594 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler test (Mips MSA test_vec) into correct folder.Matheus Almeida2-12/+9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208592 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler tests (Mips MSA test_i*, test_mi10) into correct ↵Matheus Almeida8-105/+92
folder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208590 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler tests (Mips MSA test_elm*) into correct folder.Matheus Almeida10-50/+37
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208589 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler tests (Mips MSA test_lsa, test_dlsa) into correct ↵Matheus Almeida4-18/+12
folder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208588 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler test (Mips MSA test_ctrlregs) into correct folder.Matheus Almeida2-38/+35
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208587 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler test (Mips MSA test_bit) into correct folder.Matheus Almeida2-53/+50
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208586 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips] Move disassembler tests (Mips MSA test_2r, test_2rf, test_3r, ↵Matheus Almeida8-391/+379
test_3rf) into correct folder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Revert: r208582 - [mips][mips64r6] Add sel.s and sel.dDaniel Sanders4-56/+4
Accidentally committed an unreviewed patch. Reverted it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208583 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips][mips64r6] Add sel.s and sel.dDaniel Sanders4-4/+56
Summary: Also use named constants for common opcode fields. Depends on D3669 Reviewers: jkolek, vmedic, zoran.jovanovic Differential Revision: http://reviews.llvm.org/D3670 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208582 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[ARM64-BE] Correct grammar mistake pointed out by Tobias.James Molloy1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208580 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips][mips64r6] Add d?div, d?mod, d?divu, d?moduDaniel Sanders4-8/+44
Summary: Depends on D3668 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3669 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208579 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[ARM64-BE] Add sphinx documentation for the ARM64 NEON implementation.James Molloy6-0/+211
There are some interesting decisions based on non-obvious rationale in the ARM64-BE NEON implementation - decent documentation is definitely required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12[mips][mips64r6] Added mul/mulu/muh/muhuDaniel Sanders7-9/+139
Summary: The 'mul' line of the test is temporarily commented out because it currently matches the MIPS32 mul instead of the MIPS32r6 mul. This line will be uncommented when we disable the MIPS32 mul on MIPS32r6. Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3668 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208576 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Move EmitDwarfAdvanceLineAddr and EmitDwarfAdvanceFrameAddr to the obj streamer.Rafael Espindola5-40/+2
This lets us delete the MCAsmStreamer implementation. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208570 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Pass a MCObjectStreamer instead of a MCStreamer when possible.Rafael Espindola1-9/+9
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208569 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Pass a MCObjectStreamer instead of a MCStreamer when possible.Rafael Espindola2-11/+12
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208567 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Silencing an MSVC warning about not all control paths returning a value ↵Aaron Ballman1-0/+1
(even though the switch is fully covered). No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208565 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12ARM64: remove dead validation code from the AsmParser.Tim Northover1-198/+0
If this code triggers, any immediate has already been validated so it can't possibly trigger a diagnostic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208564 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12ARM64: merge "extend" and "shift" addressing-mode enums.Tim Northover6-330/+241
In terms of assembly, these have too much overlap to be neatly modelled as disjoint classes: in many cases "lsl" is an acceptable alternative to either "uxtw" or "uxtx". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208563 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Move EH/Debug frame handling to the object streamer.Rafael Espindola4-23/+27
Now that the asm streamer doesn't use it, the MCStreamer doesn't need to know about it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208562 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Remove always true argument and unused field.Rafael Espindola3-26/+9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208561 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12Remove always true argument and field.Rafael Espindola1-10/+7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208559 91177308-0d34-0410-b5e6-96231b3b80d8