AgeCommit message (Expand)AuthorFilesLines
2012-07-14Fix warningsr600-final-pushTom Stellard13-18/+6
2012-07-13XXX: Fix codeemitter merge mistakeTom Stellard1-1/+1
2012-07-13Remove variable ops from callTom Stellard1-1/+1
2012-07-13XXX: Fix AMDGPU makefile mistakeTom Stellard1-2/+2
2012-07-13AMDGPU CRLF: FixTom Stellard1-1/+1
2012-07-13R600: Coding style fixesTom Stellard2-409/+325
2012-07-13R600: Clean up AMDILIntrinsicInfo.cppTom Stellard2-84/+5
2012-07-13R600: Use multiclasses for floating point loadsTom Stellard7-50/+46
2012-07-13R600: Don't set the IMM bit in SMRD instruction definitions.Tom Stellard1-7/+2
2012-07-13test/CodeGen/R600: Add some basic tests v5Tom Stellard27-0/+212
2012-07-13Build script changes for R600/SI Codegen v5Tom Stellard6-11/+17
2012-07-13include/llvm: Add R600 Intrinsics v5Tom Stellard2-0/+37
2012-07-13AMDGPU: Add core backend files for R600/SI codegen v5Tom Stellard114-0/+28513
2012-07-13test case for revision 160084: Alignment filling between Mips function unitsjacksprat1-0/+23
2012-07-13Make helper functions static.d0k2-2/+2
2012-07-13Initializers for some fields were missing in Option::Optionalexfh1-4/+4
2012-07-13ReleaseNotes.html: add note about specifying TLS modelshans1-0/+2
2012-07-13Post-dom frontier was removed in 3.0. Patch by chenwj.baldrick1-1/+0
2012-07-13Restrict this to x86, hopefully fixing ARM buildbots.baldrick1-1/+1
2012-07-13Mark VINSERTI128rm as MayLoad=1. Fixes PR13348.ctopper1-2/+2
2012-07-13Fixed few warnings; trimmed empty lines.gkistanova1-123/+151
2012-07-13Provide function name in 'Cannot select' fatal error.grosbach1-0/+1
2012-07-12The end of the prologue should be marked with is_stmt.echristo2-1/+29
2012-07-12TableGen: Assembly matcher 'insufficient operands' diagnostic.grosbach1-0/+1
2012-07-12Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck.ahatanak8-760/+694
2012-07-12Fixed few warnings.gkistanova3-7/+10
2012-07-12Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...d0k3-4/+43
2012-07-12The LIT tests below do not specify the exact cpu model and fail on AVX2 machi...nadav5-9/+9
2012-07-12fix typo in generated commentggreif1-1/+1
2012-07-12llvm/test/CodeGen/X86/rdrand.ll: Relax expression corresponding to Win64 CC.chapuni1-7/+7
2012-07-12llvm/test/CMakeLists.txt: Add llvm-diff to deps.chapuni1-1/+3
2012-07-12Use %s instead of the explicit name, the latter doesn't work in out-of-tree b...d0k1-1/+1
2012-07-12Add intrinsics for Ivy Bridge's rdrand instruction.d0k5-3/+107
2012-07-12The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type ofbaldrick2-0/+30
2012-07-12Update GATHER instructions to support 2 read-write operands. Patch from mysel...ctopper7-30/+77
2012-07-12Instcombine was transforming:evancheng2-0/+25
2012-07-12TableGen: Location information for diagnostic.grosbach1-1/+1
2012-07-11ARM: fix typo in commentsmren1-1/+1
2012-07-11ARM: Fix optimizeCompare to correctly check safe condition.mren2-9/+33
2012-07-11Patch for Mips direct object generation.jacksprat1-0/+8
2012-07-11Fixup broken doc link. Patch by Sean Silva <>.mcrosier2-2/+2
2012-07-11This change removes an "initialization" warning.jacksprat1-4/+3
2012-07-11Fixed diff comparison.dyatkovskiy1-1/+1
2012-07-11In MemoryBuffer::getOpenFile() don't verify that the mmap'edakirtzidis1-10/+0
2012-07-11In register classes in, list the registers in ascendingahatanak1-99/+114
2012-07-11[x86 fast-isel] Per discussion with Eric, add all cases to switch with verbosemcrosier1-1/+8
2012-07-11Test case for r160036.ahatanak1-0/+22
2012-07-11X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) pair.mren2-1/+34