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Age	Commit message (Expand)	Author	Files	Lines
2012-07-14	Fix warningsr600-final-push	Tom Stellard	13	-18/+6
2012-07-13	XXX: Fix codeemitter merge mistake	Tom Stellard	1	-1/+1
2012-07-13	Remove variable ops from call	Tom Stellard	1	-1/+1
2012-07-13	XXX: Fix AMDGPU makefile mistake	Tom Stellard	1	-2/+2
2012-07-13	AMDGPU CRLF: Fix	Tom Stellard	1	-1/+1
2012-07-13	R600: Coding style fixes	Tom Stellard	2	-409/+325
2012-07-13	R600: Clean up AMDILIntrinsicInfo.cpp	Tom Stellard	2	-84/+5
2012-07-13	R600: Use multiclasses for floating point loads	Tom Stellard	7	-50/+46
2012-07-13	R600: Don't set the IMM bit in SMRD instruction definitions.	Tom Stellard	1	-7/+2
2012-07-13	test/CodeGen/R600: Add some basic tests v5	Tom Stellard	27	-0/+212
2012-07-13	Build script changes for R600/SI Codegen v5	Tom Stellard	6	-11/+17
2012-07-13	include/llvm: Add R600 Intrinsics v5	Tom Stellard	2	-0/+37
2012-07-13	AMDGPU: Add core backend files for R600/SI codegen v5	Tom Stellard	114	-0/+28513
2012-07-13	test case for revision 160084: Alignment filling between Mips function units	jacksprat	1	-0/+23
2012-07-13	Make helper functions static.	d0k	2	-2/+2
2012-07-13	Initializers for some fields were missing in Option::Option	alexfh	1	-4/+4
2012-07-13	ReleaseNotes.html: add note about specifying TLS models	hans	1	-0/+2
2012-07-13	Post-dom frontier was removed in 3.0. Patch by chenwj.	baldrick	1	-1/+0
2012-07-13	Restrict this to x86, hopefully fixing ARM buildbots.	baldrick	1	-1/+1
2012-07-13	Mark VINSERTI128rm as MayLoad=1. Fixes PR13348.	ctopper	1	-2/+2
2012-07-13	Fixed few warnings; trimmed empty lines.	gkistanova	1	-123/+151
2012-07-13	Provide function name in 'Cannot select' fatal error.	grosbach	1	-0/+1
2012-07-12	The end of the prologue should be marked with is_stmt.	echristo	2	-1/+29
2012-07-12	TableGen: Assembly matcher 'insufficient operands' diagnostic.	grosbach	1	-0/+1
2012-07-12	Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck.	ahatanak	8	-760/+694
2012-07-12	Fixed few warnings.	gkistanova	3	-7/+10
2012-07-12	Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...	d0k	3	-4/+43
2012-07-12	Regenerate.	echristo	1	-1/+1
2012-07-12	The LIT tests below do not specify the exact cpu model and fail on AVX2 machi...	nadav	5	-9/+9
2012-07-12	detabify	ggreif	1	-2/+2
2012-07-12	fix typo in generated comment	ggreif	1	-1/+1
2012-07-12	llvm/test/CodeGen/X86/rdrand.ll: Relax expression corresponding to Win64 CC.	chapuni	1	-7/+7
2012-07-12	llvm/test/CMakeLists.txt: Add llvm-diff to deps.	chapuni	1	-1/+3
2012-07-12	Use %s instead of the explicit name, the latter doesn't work in out-of-tree b...	d0k	1	-1/+1
2012-07-12	Add intrinsics for Ivy Bridge's rdrand instruction.	d0k	5	-3/+107
2012-07-12	The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type of	baldrick	2	-0/+30
2012-07-12	Update GATHER instructions to support 2 read-write operands. Patch from mysel...	ctopper	7	-30/+77
2012-07-12	Instcombine was transforming:	evancheng	2	-0/+25
2012-07-12	TableGen: Location information for diagnostic.	grosbach	1	-1/+1
2012-07-11	ARM: fix typo in comments	mren	1	-1/+1
2012-07-11	ARM: Fix optimizeCompare to correctly check safe condition.	mren	2	-9/+33
2012-07-11	Patch for Mips direct object generation.	jacksprat	1	-0/+8
2012-07-11	Fixup broken doc link. Patch by Sean Silva <silvas@purdue.edu>.	mcrosier	2	-2/+2
2012-07-11	This change removes an "initialization" warning.	jacksprat	1	-4/+3
2012-07-11	Fixed diff comparison.	dyatkovskiy	1	-1/+1
2012-07-11	In MemoryBuffer::getOpenFile() don't verify that the mmap'ed	akirtzidis	1	-10/+0
2012-07-11	In register classes in MipsRegisterInfo.td, list the registers in ascending	ahatanak	1	-99/+114
2012-07-11	[x86 fast-isel] Per discussion with Eric, add all cases to switch with verbose	mcrosier	1	-1/+8
2012-07-11	Test case for r160036.	ahatanak	1	-0/+22
2012-07-11	X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) pair.	mren	2	-1/+34