summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2014-02-03R600: AsmPrinter - Call EmitFunctionHeader() to populate symbol tableclover-elfTom Stellard1-5/+1
2014-01-31R600/SI: Don't assume copies will be coalesced in SIFixSGPRCopiesTom Stellard1-1/+1
There is no lit test for this, because it would be too big and complicated, but it does fix a crash in the Arithm/Absdiff.* OpenCV test.
2014-01-31R600/SI: Custom lower i64 ISD::SELECTTom Stellard3-0/+40
2014-01-31XXX: Matt's patchTom Stellard2-15/+186
2014-01-31R600/SI: Add a MUBUF store pattern for Reg+Imm offsetsTom Stellard3-1/+23
2014-01-31R600/SI: Add a MUBUF store pattern for Imm offsetsTom Stellard2-0/+40
2014-01-31R600/SI: Add a MUBUF load pattern for Reg+Imm offsetsTom Stellard2-0/+56
2014-01-31R600/SI: Use immediates offsets for SMRD instructions whenever possibleTom Stellard3-10/+93
There was a problem with the old pattern, so we were copying some larger immediates into registers when we could have been encoding them in the instruction.
2014-01-31R600/SI: Expand all v8[if]32 operationsTom Stellard5-17/+95
2014-01-28R600/SI: Expand i1 BR_CCTom Stellard1-0/+2
This fixes a crashes in the OpenCV test suite and also the scrypt kernel in bfgminer. I was unable to come up with a reduced test case for this. https://bugs.freedesktop.org/show_bug.cgi?id=72785
2014-01-28[X86] Add extra rules for combining vselect dag nodes into movsd.Andrea Di Biagio3-2/+75
This improves the fix committed at revision 199683 adding the following new target specific combine rules: 1) fold (v4i32: vselect <0,0,-1,-1>, A, B) -> (v4i32 (bitcast (movsd (v2i64 (bitcast A)), (v2i64 (bitcast B))) )) 2) fold (v4f32: vselect <0,0,-1,-1>, A, B) -> (v4f32 (bitcast (movsd (v2f64 (bitcast A)), (v2f64 (bitcast B))) )) 3) fold (v4i32: vselect <-1,-1,0,0>, A, B) -> (v4i32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) )) 4) fold (v4f32: vselect <-1,-1,0,0>, A, B) -> (v4f32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) )) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200324 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28typoAdrian Prantl1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Fix pr14893.Rafael Espindola4-0/+99
When simplifycfg moves an instruction, it must drop metadata it doesn't know is still valid with the preconditions changes. In particular, it must drop the range and tbaa metadata. The patch implements this with an utility function to drop all metadata not in a white list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200322 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28The llvm_headers_do_not_build project needs to be excluded from the default ↵Aaron Ballman1-2/+3
build, otherwise it gets built (at least in Visual Studio 2013). Thanks to chapuni200000 for help with this in IRC! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200321 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[DAGCombiner] Avoid introducing an illegal build_vector when folding a ↵Andrea Di Biagio2-9/+27
sign_extend. Make sure that we don't introduce illegal build_vector dag nodes when trying to fold a sign_extend of a build_vector. This fixes a regression introduced by r200234. Added test CodeGen/X86/fold-vector-sext-crash.ll to verify that llc no longer crashes with an assertion failure due to an illegal build_vector of type MVT::v4i64. Thanks to Ilia Filippov for spotting this regression and for providing a reproducible test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200313 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] llvm_update_compile_flags(name) doesn't require source files. TARGET ↵NAKAMURA Takumi1-6/+6
PROPERTY SOURCES has them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200311 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Provide a stub Target Streamer implementation for PPC MachOIain Sandoe1-2/+17
At present, this handles .tc (error) and needs to be expanded to deal properly with .machine git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200309 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] Prune CMAKE_CXX_FLAGS stuff in llvm_process_sources.NAKAMURA Takumi1-18/+0
It is the final step to deprecate contextual CMAKE_CXX_FLAGS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200303 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] Enhance llvm_update_compile_flags(name sources) to handle ↵NAKAMURA Takumi2-8/+43
LLVM_REQUIRES_EH and LLVM_REQUIRES_RTTI. LLVM_REQUIRES_EH implies LLVM_REQUIRES_RTTI. It is as same behavior as Makefile.rule's. llvm/examples/ExceptionDemo is affected. (It was built with -fno-rtti.) For MSVC, Remove flags like "/EHsc /GR" in HandleLLVMOptions, or CL.EXE complains with flags like "/GR /GR-". llvm_update_compile_flags() updates source file property if the target contains *.c. COMPILE_FLAGS in target properties affects both C++ and C! LLVM_NO_RTTI is deprecated. It was introduced by me and was my mistake. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200301 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] Apply -ffunction-data-sectinos not only to CMAKE_CXX_FLAGS, but also ↵NAKAMURA Takumi1-1/+1
to CMAKE_C_FLAGS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200300 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] Move -ffunction-data-sections stuff to HandleLLVMOptions.NAKAMURA Takumi2-10/+11
With this tweaks, also unittests are compiled with -ffunction-sections. It's hard to control contextual CMAKE_CXX_FLAGS. We should get rid of twiddling it as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] Let llvm_process_sources check not only *.cpp but also *.c.NAKAMURA Takumi1-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200298 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[CMake] Put lli-child-target into the Folder "Misc".NAKAMURA Takumi1-0/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[vectorizer] Completely disable the block frequency guidance of the loopChandler Carruth2-4/+14
vectorizer, placing it behind an off-by-default flag. It turns out that block frequency isn't what we want at all, here or elsewhere. This has been I think a nagging feeling for several of us working with it, but Arnold has given some really nice simple examples where the results are so comprehensively wrong that they aren't useful. I'm planning to email the dev list with a summary of why its not really useful and a couple of ideas about how to better structure these types of heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Handle spilling the PPC GPRC_NOR0 register classHal Finkel2-4/+31
GPRC_NOR0 is not a subclass of GPRC (because it also contains the ZERO pseudo register). As a result, we also need to check for it in the spilling code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Improve handling of EnforceSmallerThan. Remove all types that are smaller ↵Craig Topper2-137/+91
from the larger set not just the smallest type from the smaller set. Ensure 'smaller' vectors have the same or fewer total bits. Similar for 'larger' vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28MC: Add a .debug section that we'll soon use to emit debug info into COFF filesTimur Iskhodzhanov2-0/+13
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200285 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28R600/SI: Add pattern for truncating i32 to i1Michel Danzer2-0/+15
Fixes half a dozen piglit tests with radeonsi. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200283 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Fix the DWARF EH encodings for Sparc PIC code.Jakob Stoklund Olesen3-17/+108
Also emit the stubs that were generated for references to typeinfo symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200282 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Update optimization passes to handle inalloca argumentsReid Kleckner14-20/+124
Summary: I searched Transforms/ and Analysis/ for 'ByVal' and updated those call sites to check for inalloca if appropriate. I added tests for any change that would allow an optimization to fire on inalloca. Reviewers: nlewycky Differential Revision: http://llvm-reviews.chandlerc.com/D2449 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28x86: add implicit defs for cpuidReid Kleckner1-2/+7
This avoids miscompiling MS inline asm in LLVM where we have to infer clobbers. Test case forthcoming in Clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200279 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[LPM] Fix PR18616 where the shifts to the loop pass manager to extractChandler Carruth3-16/+30
LCSSA from it caused a crasher with the LoopUnroll pass. This crasher is really nasty. We destroy LCSSA form in a suprising way. When unrolling a loop into an outer loop, we not only need to restore LCSSA form for the outer loop, but for all children of the outer loop. This is somewhat obvious in retrospect, but hey! While this seems pretty heavy-handed, it's not that bad. Fundamentally, we only do this when we unroll a loop, which is already a heavyweight operation. We're unrolling all of these hypothetical inner loops as well, so their size and complexity is already on the critical path. This is just adding another pass over them to re-canonicalize. I have a test case from PR18616 that is great for reproducing this, but pretty useless to check in as it relies on many 10s of nested empty loops that get unrolled and deleted in just the right order. =/ What's worse is that investigating this has exposed another source of failure that is likely to be even harder to test. I'll try to come up with test cases for these fixes, but I want to get the fixes into the tree first as they're causing crashes in the wild. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200273 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28[TLI] Add a new hook to TargetLowering to query the target if a load of a ↵Juergen Ributzka10-19/+50
constant should be converted to simply the constant itself. Before this patch we used getIntImmCost from TargetTransformInfo to determine if a load of a constant should be converted to just a constant, but the threshold for this was set to an arbitrary value. This value works well for the two targets (X86 and ARM) that implement this target-hook, but it isn't target-independent at all. Now targets have the possibility to decide directly if this optimization should be performed. The default value is set to false to preserve the current behavior. The target hook has been moved to TargetLowering, which removed the last use and need of TargetTransformInfo in SelectionDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200271 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28LoopVectorize: Support conditional stores by scalarizingArnold Schwaighofer2-29/+280
The vectorizer takes a loop like this and widens all instructions except for the store. The stores are scalarized/unrolled and hidden behind an "if" block. for (i = 0; i < 128; ++i) { if (a[i] < 10) a[i] += val; } for (i = 0; i < 128; i+=2) { v = a[i:i+1]; v0 = (extract v, 0) + 10; v1 = (extract v, 1) + 10; if (v0 < 10) a[i] = v0; if (v1 < 10) a[i] = v1; } The vectorizer relies on subsequent optimizations to sink instructions into the conditional block where they are anticipated. The flag "vectorize-num-stores-pred" controls whether and how many stores to handle this way. Vectorization of conditional stores is disabled per default for now. This patch also adds a change to the heuristic when the flag "enable-loadstore-runtime-unroll" is enabled (off by default). It unrolls small loops until load/store ports are saturated. This heuristic uses TTI's getMaxUnrollFactor as a measure for load/store ports. I also added a second flag -enable-cond-stores-vec. It will enable vectorization of conditional stores. But there is no cost model for vectorization of conditional stores in place yet so this will not do good at the moment. rdar://15892953 Results for x86-64 -O3 -mavx +/- -mllvm -enable-loadstore-runtime-unroll -vectorize-num-stores-pred=1 (before the BFI change): Performance Regressions: Benchmarks/Ptrdist/yacr2/yacr2 7.35% (maze3() is identical but 10% slower) Applications/siod/siod 2.18% Performance improvements: mesa -4.42% libquantum -4.15% With a patch that slightly changes the register heuristics (by subtracting the induction variable on both sides of the register pressure equation, as the induction variable is probably not really unrolled): Performance Regressions: Benchmarks/Ptrdist/yacr2/yacr2 7.73% Applications/siod/siod 1.97% Performance Improvements: libquantum -13.05% (we now also unroll quantum_toffoli) mesa -4.27% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200270 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28Revert r199871 and replace it with a simple check in the debug infoEric Christopher16-39/+45
code to see if we're emitting a function into a non-default text section. This is still a less-than-ideal solution, but more contained than r199871 to determine whether or not we're emitting code into an array of comdat sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200269 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27Reformat slightly.Eric Christopher1-5/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200264 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27PGO branch weight: keep halving the weights until they can fit intoManman Ren2-13/+44
uint32. When folding branches to common destination, the updated branch weights can exceed uint32 by more than factor of 2. We should keep halving the weights until they can fit into uint32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200262 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27Fix the "#ifndef HAVE_SYS_WAIT_H" code path in Program.inc to compileMark Seaborn1-0/+1
Without this fix, WaitResult is not defined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200259 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27ARM MC: Fix the initial DWARF CFI unwind info at the start of a functionMark Seaborn2-2/+24
This brings MC into line with GNU 'as' on ARM, and it brings the ARM target into line with most other LLVM targets, which declare the initial CFI state with addInitialFrameState(). Without this, functions generated with .cfi_startproc/endproc on ARM will tend to cause GDB to abort with: gdb/dwarf2-frame.c:1132: internal-error: Unknown CFA rule. I've also tested this by comparing the output of "readelf -w" on the object files produced by llvm-mc and gas when given the .s file added here. This change is part of addressing PR18636. Differential Revision: http://llvm-reviews.chandlerc.com/D2597 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200255 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27Fix sext(setcc) -> select_cc using wrong type for setcc.Matt Arsenault1-10/+16
Also update the comment, since it actually produces a select (setcc) instead of select_cc. It was checking and using the setcc result type for the type of the sext, instead of the type of the compared items. In my problem case, the sext was to i32 and was used as the setcc type, but the expected type was i64. No test since I haven't been able to hit the problem with this on any in-tree targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200249 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27Fix unsupported addressing mode assertion for pldDavid Peixotto4-24/+24
Summary: This commit gives an address mode to the PLD instruction. We were getting an assertion failure in the frame lowering code because we had code that was doing a pld of a stack allocated address. The frame lowering was checking the address mode and then asserting because pld had none defined. This commit fixes pld for arm mode. There was a previous fix for thumb mode in a separate commit. The commit for thumb mode added a test in a separate file because it would otherwise fail for arm. This commit moves the thumb test back into the prefetch.ll file and adds the corresponding arm test. Differential Revision: http://llvm-reviews.chandlerc.com/D2622 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200248 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27test commit: add minor commentGautam Chakrabarti1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200244 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27[DAGCombiner] Teach how to fold sext/aext/zext of constant build vectors.Andrea Di Biagio4-21/+372
This patch teaches the DAGCombiner how to fold a sext/aext/zext dag node when the operand in input is a build vector of constants (or UNDEFs). The inability to fold a sext/zext of a constant build_vector was the root cause of some pcg bugs affecting vselect expansion on x86-64 with AVX support. Before this change, the DAGCombiner only knew how to fold a sext/zext/aext of a ConstantSDNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200234 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27Silence MSVC warning on 'uint16_t |= bool' with a castReid Kleckner1-1/+1
This isn't C4800, it's C4805. MSVC says this is unsafe, but it generates correct code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200229 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27[CMake] Put *_exports into "Misc" folder.NAKAMURA Takumi1-0/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200228 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27MC: Add support for .cfi_startproc simpleDavid Majnemer8-23/+49
This commit allows LLVM MC to process .cfi_startproc directives when they are followed by an additional `simple' identifier. This signals to elide the emission of target specific CFI instructions that would normally occur initially. This fixes PR16587. Differential Revision: http://llvm-reviews.chandlerc.com/D2624 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200227 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27Do not reference llvm-gcc from bugpointTobias Grosser1-3/+3
Reiterating: llvm-gcc is dead since a long time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200220 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27[vectorize] Initial version of respecting PGO in the vectorizer: treatChandler Carruth2-0/+45
cold loops as-if they were being optimized for size. Nothing fancy here. Simply test case included. The nice thing is that we can now incrementally build on top of this to drive other heuristics. All of the infrastructure work is done to get the profile information into this layer. The remaining work necessary to make this a fully general purpose loop unroller for very hot loops is to make it a fully general purpose loop unroller. Things I know of but am not going to have time to benchmark and fix in the immediate future: 1) Don't disable the entire pass when the target is lacking vector registers. This really doesn't make any sense any more. 2) Teach the unroller at least and the vectorizer potentially to handle non-if-converted loops. This is trivial for the unroller but hard for the vectorizer. 3) Compute the relative hotness of the loop and thread that down to the various places that make cost tradeoffs (very likely only the unroller makes sense here, and then only when dealing with loops that are small enough for unrolling to not completely blow out the LSD). I'm still dubious how useful hotness information will be. So far, my experiments show that if we can get the correct logic for determining when unrolling actually helps performance, the code size impact is completely unimportant and we can unroll in all cases. But at least we'll no longer burn code size on cold code. One somewhat unrelated idea that I've had forever but not had time to implement: mark all functions which are only reachable via the global constructors rigging in the module as optsize. This would also decrease the impact of any more aggressive heuristics here on code size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200219 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27ConstantHoisting: We can't insert instructions directly in front of a PHI node.Benjamin Kramer3-3/+70
Insert before the terminating instruction of the dominating block instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27XCore: Fix typo in function name.Benjamin Kramer3-10/+10
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200216 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-01 02:13:05 +0000