~tstellar/llvm - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2012-10-12	R600: use ceil intrinsic instead of llvm.AMDIL.round.posinf	Vincent Lejeune	2	-4/+0
2012-10-12	R600: use floor intrinsic instead of llvm.AMDIL.floor	Vincent Lejeune	5	-5/+5
2012-10-12	R600: use llvm fabs intrinsic	Vincent Lejeune	3	-5/+3
2012-10-12	R600: use llvm intrinsic for flog2	Vincent Lejeune	3	-3/+2
2012-10-12	R600: add support for cos/sin intrinsic	Vincent Lejeune	4	-14/+17
2012-10-12	R600: add a pattern for fsqrt	Vincent Lejeune	1	-0/+3
2012-10-12	R600: Store channel index in the register's HWEncoding field	Tom Stellard	8	-1117/+31
2012-10-11	AMDGPU: Fix lowering of UREM	tstellar	1	-5/+4
2012-10-11	AMDGPU: Fix build after merging of DataLayout changes	tstellar	3	-5/+5
2012-10-11	Merge master branch	tstellar	602	-8117/+12984
2012-10-10	R600: Fix typo in SETGE_UINT pattern	tstellar	1	-1/+1
2012-10-09	R600: Disable SI flow control again for now	tstellar	1	-1/+2
2012-10-09	R600: Handle reversed true/false values in selectcc	tstellar	2	-6/+26
2012-10-09	R600: Prefer lowering SELECT_CC to CND* instructions over SET* instructions	tstellar	2	-42/+66
2012-10-09	R600: Fix lowering of fcmp	tstellar	4	-7/+55
2012-10-09	R600: Add a pattern for: (selectcc i32, -1, i32, i32, SETGT)	tstellar	2	-0/+28
2012-10-09	R600: Add a comment explaining why we use TRUNC before FLT_TO_*INT	tstellar	1	-0/+10
2012-10-09	R600: Add store v4i32 test	tstellar	1	-0/+9
2012-10-09	R600: Add tests for a few vector operations	tstellar	7	-0/+106
2012-10-03	SI: Mark the V_CMPX* instructions as having side effects	tstellar	1	-0/+32
2012-10-03	R600: Handle more vector arithmetic instructions	tstellar	1	-0/+8
2012-10-03	R600: Implement getSetCCResultType in R600TargetLowering class	tstellar	2	-0/+8
2012-10-03	R600: Add support for v4i32 global stores	tstellar	1	-0/+6
2012-10-03	SI: Fix crash in unused register search in LowerFlowControl pass	tstellar	1	-4/+4
2012-10-03	SI: S_WAITCNT has side effects	tstellar	1	-0/+2
2012-10-03	SI: Set the section in the Asm Printer before emitting program info	tstellar	1	-1/+1
2012-10-03	SI: Fix bug in loops where iterators may be deleted	tstellar	2	-2/+4
2012-10-03	SI: Add sanity test	tstellar	1	-0/+37
2012-10-02	Merge master branch	tstellar	36	-121/+423
2012-10-02	R600: improve select_cc lowering to generate CND* more often	tstellar	5	-42/+110
2012-10-02	R600: Fix instruction encoding for r600 family GPUs	tstellar	3	-15/+15
2012-10-02	Merge master branch	tstellar	237	-2024/+11083
2012-10-02	Merge TOT	tstellar	33	-168/+699
2012-09-25	R600: Fix typo in R600RegisterInfo.td	tstellar	1	-1/+1
2012-09-25	AMDGPU: Fix register encoding	tstellar	3	-12/+6
2012-09-24	R600: support for interpolation intrinsics	tstellar	9	-1/+307
2012-09-24	R600: Handle loads from the constants address space.	tstellar	3	-0/+19
2012-09-24	R600: Expand vector fadd and fmul on R600	tstellar	3	-0/+33
2012-09-24	R600: Add support for v4f32 stores on R600	tstellar	4	-9/+36
2012-09-24	R600: Add optimization for FP_ROUND	tstellar	3	-0/+38
2012-09-24	R600: Add support for i8 reads on R600	tstellar	4	-0/+35
2012-09-24	R600: Replace AMDGPU pow intrinsic with the llvm version	tstellar	4	-3/+6
2012-09-24	Enable the new SROA pass by default.	tstellar	1	-1/+1
2012-09-24	Address one of the original FIXMEs for the new SROA pass by implementing	tstellar	2	-21/+161
2012-09-24	Emit dtors into proper section while compiling in vcpp-compatible mode.	tstellar	2	-12/+31
2012-09-24	Switch to a signed representation for the dynamic offsets while walking	tstellar	2	-26/+133
2012-09-24	Don't do actual work inside an assert statement. Fixes PR11760!	tstellar	4	-4/+9
2012-09-24	Revise test to avoid using of 'grep'	tstellar	1	-20/+14
2012-09-24	Add LLVM_OVERRIDE to methods that override their base classes.	tstellar	17	-66/+73
2012-09-24	Enhance test case of atomic16 to verify inst encoding fixed in r164453.	tstellar	1	-0/+6