1 files changed, 31 insertions, 14 deletions

diff --git a/lib/Target/AMDGPU/SIISelLowering.cpp b/lib/Target/AMDGPU/SIISelLowering.cpp
index 6fd38ca9022..3d0456052bd 100644
--- a/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -877,6 +877,33 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
   SDNode *Intr = BRCOND.getOperand(1).getNode();
   SDValue Target = BRCOND.getOperand(2);
   SDNode *BR = nullptr;
+  bool InvertBranch = false;
+
+  if (Intr->getOpcode() == ISD::INTRINSIC_WO_CHAIN) {
+    unsigned IntrinsicID =
+        cast<ConstantSDNode>(Intr->getOperand(0))->getZExtValue();
+    if (IntrinsicID == AMDGPUIntrinsic::AMDGPU_uniform_cond)
+      return BRCOND;
+  }
+
+  if (Intr->getOperand(0).getOpcode() == ISD::INTRINSIC_WO_CHAIN) {
+    unsigned IntrinsicID =
+        cast<ConstantSDNode>(Intr->getOperand(0)->getOperand(0))->getZExtValue();
+    if (IntrinsicID == AMDGPUIntrinsic::AMDGPU_uniform_cond) {
+      SDValue UniformCond = Intr->getOperand(0);
+      SDValue RealCond = UniformCond.getOperand(1);
+      SDValue Cond = BRCOND.getOperand(1);
+
+      //brcond <- cond <- uniformcond <- realcond
+      DAG.ReplaceAllUsesWith(UniformCond, RealCond);
+      //brcond <- cond <- realcond
+      SDValue NewUniformCond = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, MVT::i1,
+                                           DAG.getTargetConstant(AMDGPUIntrinsic::AMDGPU_uniform_cond, DL, MVT::i32),
+                                           Cond);
+      return DAG.getNode(ISD::BRCOND, DL, MVT::Other,
+                         BRCOND.getOperand(0), NewUniformCond, Target);
+    }
+  }
 
   if (Intr->getOpcode() == ISD::SETCC) {
     // As long as we negate the condition everything is fine
@@ -885,6 +912,7 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
     assert(cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
            ISD::SETNE);
     Intr = SetCC->getOperand(0).getNode();
+    InvertBranch = true;
 
   } else {
     // Get the target from BR if we don't negate the condition
@@ -892,20 +920,9 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
     Target = BR->getOperand(1);
   }
 
-  #if 1
-  if (Intr->getOpcode() == ISD::INTRINSIC_WO_CHAIN) {
-    unsigned IntrinsicID = cast<ConstantSDNode>(Intr->getOperand(0))->getZExtValue();
-
-    if (IntrinsicID == AMDGPUIntrinsic::AMDGPU_uniform_cond) {
-      SDValue Cond = Intr->getOperand(1);
-      return DAG.getNode(AMDGPUISD::BRCOND_UNIFORM, DL, MVT::Other,
-                         BRCOND.getOperand(0), Cond, BRCOND.getOperand(2));
-    }
-  }
-
-  #endif
-
-  assert(Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN);
+//  DAG.dump();
+//  Intr->dump();
+//  assert(Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN);
 
   // Build the result and
   ArrayRef<EVT> Res(Intr->value_begin() + 1, Intr->value_end());