1 files changed, 73 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp
index a60a1802d48..09db5c10021 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -16,8 +16,12 @@
 #include "AMDGPUTargetMachine.h"
 #include "AMDGPUSubtarget.h"
 #include "R600Defines.h"
+#include "R600MachineFunctionInfo.h"
 #include "R600RegisterInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Instructions.h"
 
 #define GET_INSTRINFO_CTOR
 #include "AMDGPUGenDFAPacketizer.inc"
@@ -464,6 +468,75 @@ unsigned int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
   return 2;
 }
 
+unsigned R600InstrInfo::getIndirectIndexBegin(const MachineFunction &MF) const
+{
+  const MachineRegisterInfo &MRI = MF.getRegInfo();
+  const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
+  unsigned Offset = 0;
+
+  if (MRI.livein_empty() && MFI->ReservedRegs.empty()) {
+    return 0;
+  }
+
+  for (MachineRegisterInfo::livein_iterator LI = MRI.livein_begin(),
+                                            LE = MRI.livein_end();
+                                            LI != LE; ++LI) {
+    Offset = std::max(Offset,
+                      (unsigned)GET_REG_INDEX(RI.getEncodingValue(LI->first)));
+  }
+
+  for (std::vector<unsigned>::const_iterator RRI = MFI->ReservedRegs.begin(),
+                                             RRE = MFI->ReservedRegs.end();
+                                             RRI != RRE; ++RRI) {
+    Offset = std::max(Offset,
+                     (unsigned GET_REG_INDEX(RI.getEncodingValue(*RRI))));
+  }
+
+  return Offset + 1;
+}
+
+unsigned R600InstrInfo::getIndirectIndexEnd(const MachineFunction &MF) const
+{
+  unsigned Offset = 0;
+  const MachineFrameInfo *MFI = MF.getFrameInfo();
+
+  // Variable sized objects are not supported
+  assert(!MFI->hasVarSizedObjects());
+
+  // Only one stack object is supported at the moment
+//  assert(MFI->getNumObjects() <= 1);
+
+  if (MFI->getNumObjects() == 0) {
+    return 0;
+  }
+
+  Offset = TM.getFrameLowering()->getFrameIndexOffset(MF, -1);
+
+  return getIndirectIndexBegin(MF) + Offset;
+}
+
+std::vector<unsigned> R600InstrInfo::getIndirectReservedRegs(
+                                             const MachineFunction &MF) const
+{
+  const AMDGPUFrameLowering *TFL =
+                 static_cast<const AMDGPUFrameLowering*>(TM.getFrameLowering());
+  const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
+  unsigned StackWidth = TFL->getStackWidth(MF);
+  unsigned End = getIndirectIndexEnd(MF);
+
+  std::vector<unsigned> Regs;
+
+  for (unsigned Index = getIndirectIndexBegin(MF); Index <= End; ++Index) {
+    unsigned SuperReg = AMDGPU::R600_Reg128RegClass.getRegister(Index);
+    Regs.push_back(SuperReg);
+    for (unsigned Chan = 0; Chan < StackWidth; ++Chan) {
+      unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister((4 * Index) + Chan);
+      Regs.push_back(Reg);
+    }
+  }
+  return Regs;
+}
+
 MachineInstrBuilder R600InstrInfo::buildDefaultInstruction(MachineBasicBlock &MBB,
                                                   MachineBasicBlock::iterator I,
                                                   unsigned Opcode,