3 files changed, 24 insertions, 5 deletions
diff --git a/lib/Target/AMDIL/AMDGPUSubtarget.h b/lib/Target/AMDIL/AMDGPUSubtarget.h
new file mode 100644
index 00000000000..2a1136ddb90
--- /dev/null
+++ b/lib/Target/AMDIL/AMDGPUSubtarget.h
@@ -0,0 +1,20 @@
+
+#include "AMDILSubtarget.h"
+
+namespace llvm {
+
+class AMDGPUSubtarget : public AMDILSubtarget
+{
+  InstrItineraryData InstrItins;
+
+public:
+  AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
+    AMDILSubtarget(TT, CPU, FS)
+  {
+    InstrItins = getInstrItineraryForCPU(CPU);
+  }
+
+  const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
+};
+
+} // End namespace llvm
diff --git a/lib/Target/AMDIL/AMDGPUTargetMachine.cpp b/lib/Target/AMDIL/AMDGPUTargetMachine.cpp
index abfd037f25f..98009bac00d 100644
--- a/lib/Target/AMDIL/AMDGPUTargetMachine.cpp
+++ b/lib/Target/AMDIL/AMDGPUTargetMachine.cpp
@@ -156,8 +156,8 @@ bool AMDGPUPassConfig::addPreRegAlloc() {
     PM.add(createSIConvertToISAPass(*TM));
   }
   PM.add(createAMDGPUConvertToISAPass(*TM));
-//  addPass(RegisterCoalescerID);
-//  addPass(ExpandPostRAPseudosID);
+  addPass(RegisterCoalescerID);
+  addPass(ExpandPostRAPseudosID);
   return false;
 }
 
diff --git a/lib/Target/AMDIL/AMDGPUTargetMachine.h b/lib/Target/AMDIL/AMDGPUTargetMachine.h
index 3b14d53e4db..1101ac8a81c 100644
--- a/lib/Target/AMDIL/AMDGPUTargetMachine.h
+++ b/lib/Target/AMDIL/AMDGPUTargetMachine.h
@@ -26,8 +26,7 @@ namespace llvm {
 MCAsmInfo* createMCAsmInfo(const Target &T, StringRef TT);
 
 class AMDGPUTargetMachine : public AMDILTargetMachine {
-<<<<<<< HEAD
-     AMDILSubtarget Subtarget;
+     AMDGPUSubtarget Subtarget;
      const AMDGPUInstrInfo * InstrInfo;
      AMDGPUTargetLowering * TLInfo;
      AMDILGlobalManager *mGM;
@@ -43,7 +42,7 @@ public:
                        CodeGenOpt::Level OL);
    ~AMDGPUTargetMachine();
    virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;}
-   virtual const AMDILSubtarget *getSubtargetImpl() const {return &Subtarget; }
+   virtual const AMDGPUSubtarget *getSubtargetImpl() const {return &Subtarget; }
    virtual const AMDGPURegisterInfo *getRegisterInfo() const {
       return &InstrInfo->getRegisterInfo();
    }