diff options
| -rw-r--r-- | lib/Target/R600/AMDGPU.td | 66 | ||||
| -rw-r--r-- | lib/Target/R600/AMDILBase.td | 64 |
2 files changed, 66 insertions, 64 deletions
diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td index 1a26c77d6bb..335b26cbf2c 100644 --- a/lib/Target/R600/AMDGPU.td +++ b/lib/Target/R600/AMDGPU.td @@ -10,6 +10,72 @@ // Include AMDIL TD files include "AMDILBase.td" +//===----------------------------------------------------------------------===// +// Subtarget Features +//===----------------------------------------------------------------------===// + +def FeatureFP64 : SubtargetFeature<"fp64", + "CapsOverride[AMDGPUDeviceInfo::DoubleOps]", + "true", + "Enable 64bit double precision operations">; +def FeatureByteAddress : SubtargetFeature<"byte_addressable_store", + "CapsOverride[AMDGPUDeviceInfo::ByteStores]", + "true", + "Enable byte addressable stores">; +def FeatureBarrierDetect : SubtargetFeature<"barrier_detect", + "CapsOverride[AMDGPUDeviceInfo::BarrierDetect]", + "true", + "Enable duplicate barrier detection(HD5XXX or later).">; +def FeatureImages : SubtargetFeature<"images", + "CapsOverride[AMDGPUDeviceInfo::Images]", + "true", + "Enable image functions">; +def FeatureMultiUAV : SubtargetFeature<"multi_uav", + "CapsOverride[AMDGPUDeviceInfo::MultiUAV]", + "true", + "Generate multiple UAV code(HD5XXX family or later)">; +def FeatureMacroDB : SubtargetFeature<"macrodb", + "CapsOverride[AMDGPUDeviceInfo::MacroDB]", + "true", + "Use internal macrodb, instead of macrodb in driver">; +def FeatureNoAlias : SubtargetFeature<"noalias", + "CapsOverride[AMDGPUDeviceInfo::NoAlias]", + "true", + "assert that all kernel argument pointers are not aliased">; +def FeatureNoInline : SubtargetFeature<"no-inline", + "CapsOverride[AMDGPUDeviceInfo::NoInline]", + "true", + "specify whether to not inline functions">; + +def Feature64BitPtr : SubtargetFeature<"64BitPtr", + "Is64bit", + "false", + "Specify if 64bit addressing should be used.">; + +def Feature32on64BitPtr : SubtargetFeature<"64on32BitPtr", + "Is32on64bit", + "false", + "Specify if 64bit sized pointers with 32bit addressing should be used.">; +def FeatureDebug : SubtargetFeature<"debug", + "CapsOverride[AMDGPUDeviceInfo::Debug]", + "true", + "Debug mode is enabled, so disable hardware accelerated address spaces.">; +def FeatureDumpCode : SubtargetFeature <"DumpCode", + "DumpCode", + "true", + "Dump MachineInstrs in the CodeEmitter">; + +def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst", + "R600ALUInst", + "false", + "Older version of ALU instructions encoding.">; + +def FeatureVertexCache : SubtargetFeature<"HasVertexCache", + "HasVertexCache", + "true", + "Specify use of dedicated vertex cache.">; + + def AMDGPUInstrInfo : InstrInfo { let guessInstructionProperties = 1; diff --git a/lib/Target/R600/AMDILBase.td b/lib/Target/R600/AMDILBase.td index e2211106f3f..5dcd478fe5b 100644 --- a/lib/Target/R600/AMDILBase.td +++ b/lib/Target/R600/AMDILBase.td @@ -16,70 +16,6 @@ def ALU_NULL : FuncUnit; def NullALU : InstrItinClass; //===----------------------------------------------------------------------===// -// AMDIL Subtarget features. -//===----------------------------------------------------------------------===// -def FeatureFP64 : SubtargetFeature<"fp64", - "CapsOverride[AMDGPUDeviceInfo::DoubleOps]", - "true", - "Enable 64bit double precision operations">; -def FeatureByteAddress : SubtargetFeature<"byte_addressable_store", - "CapsOverride[AMDGPUDeviceInfo::ByteStores]", - "true", - "Enable byte addressable stores">; -def FeatureBarrierDetect : SubtargetFeature<"barrier_detect", - "CapsOverride[AMDGPUDeviceInfo::BarrierDetect]", - "true", - "Enable duplicate barrier detection(HD5XXX or later).">; -def FeatureImages : SubtargetFeature<"images", - "CapsOverride[AMDGPUDeviceInfo::Images]", - "true", - "Enable image functions">; -def FeatureMultiUAV : SubtargetFeature<"multi_uav", - "CapsOverride[AMDGPUDeviceInfo::MultiUAV]", - "true", - "Generate multiple UAV code(HD5XXX family or later)">; -def FeatureMacroDB : SubtargetFeature<"macrodb", - "CapsOverride[AMDGPUDeviceInfo::MacroDB]", - "true", - "Use internal macrodb, instead of macrodb in driver">; -def FeatureNoAlias : SubtargetFeature<"noalias", - "CapsOverride[AMDGPUDeviceInfo::NoAlias]", - "true", - "assert that all kernel argument pointers are not aliased">; -def FeatureNoInline : SubtargetFeature<"no-inline", - "CapsOverride[AMDGPUDeviceInfo::NoInline]", - "true", - "specify whether to not inline functions">; - -def Feature64BitPtr : SubtargetFeature<"64BitPtr", - "Is64bit", - "false", - "Specify if 64bit addressing should be used.">; - -def Feature32on64BitPtr : SubtargetFeature<"64on32BitPtr", - "Is32on64bit", - "false", - "Specify if 64bit sized pointers with 32bit addressing should be used.">; -def FeatureDebug : SubtargetFeature<"debug", - "CapsOverride[AMDGPUDeviceInfo::Debug]", - "true", - "Debug mode is enabled, so disable hardware accelerated address spaces.">; -def FeatureDumpCode : SubtargetFeature <"DumpCode", - "DumpCode", - "true", - "Dump MachineInstrs in the CodeEmitter">; - -def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst", - "R600ALUInst", - "false", - "Older version of ALU instructions encoding.">; - -def FeatureVertexCache : SubtargetFeature<"HasVertexCache", - "HasVertexCache", - "true", - "Specify use of dedicated vertex cache.">; - -//===----------------------------------------------------------------------===// // Register File, Calling Conv, Instruction Descriptions //===----------------------------------------------------------------------===// |