diff options
author | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
commit | 84f7f350c3f8e33c2143ff44aa0a3fbbfd82657f (patch) | |
tree | 2558b3962c0fe30a89608ee7b2544277b62fb75f /utils | |
parent | 84c21b38a95235a4a2c71e0557c06d889fad6b4e (diff) |
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/CallingConvEmitter.cpp | 8 | ||||
-rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/utils/TableGen/CallingConvEmitter.cpp b/utils/TableGen/CallingConvEmitter.cpp index 96bd3361ffc..6d43e8ed387 100644 --- a/utils/TableGen/CallingConvEmitter.cpp +++ b/utils/TableGen/CallingConvEmitter.cpp @@ -112,7 +112,7 @@ void CallingConvEmitter::EmitAction(Record *Action, O << IndentStr << "if (unsigned Reg = State.AllocateReg("; O << getQualifiedName(RegList->getElementAsRecord(0)) << ")) {\n"; } else { - O << IndentStr << "static const uint16_t RegList" << ++Counter + O << IndentStr << "static const MCPhysReg RegList" << ++Counter << "[] = {\n"; O << IndentStr << " "; for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) { @@ -143,7 +143,7 @@ void CallingConvEmitter::EmitAction(Record *Action, unsigned RegListNumber = ++Counter; unsigned ShadowRegListNumber = ++Counter; - O << IndentStr << "static const uint16_t RegList" << RegListNumber + O << IndentStr << "static const MCPhysReg RegList" << RegListNumber << "[] = {\n"; O << IndentStr << " "; for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) { @@ -152,7 +152,7 @@ void CallingConvEmitter::EmitAction(Record *Action, } O << "\n" << IndentStr << "};\n"; - O << IndentStr << "static const uint16_t RegList" + O << IndentStr << "static const MCPhysReg RegList" << ShadowRegListNumber << "[] = {\n"; O << IndentStr << " "; for (unsigned i = 0, e = ShadowRegList->getSize(); i != e; ++i) { @@ -196,7 +196,7 @@ void CallingConvEmitter::EmitAction(Record *Action, unsigned ShadowRegListNumber = ++Counter; - O << IndentStr << "static const uint16_t ShadowRegList" + O << IndentStr << "static const MCPhysReg ShadowRegList" << ShadowRegListNumber << "[] = {\n"; O << IndentStr << " "; for (unsigned i = 0, e = ShadowRegList->getSize(); i != e; ++i) { diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 61ae2626e53..bc252a9bde1 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -831,7 +831,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, // Emit the table of register unit roots. Each regunit has one or two root // registers. - OS << "extern const uint16_t " << TargetName << "RegUnitRoots[][2] = {\n"; + OS << "extern const MCPhysReg " << TargetName << "RegUnitRoots[][2] = {\n"; for (unsigned i = 0, e = RegBank.getNumNativeRegUnits(); i != e; ++i) { ArrayRef<const CodeGenRegister*> Roots = RegBank.getRegUnit(i).getRoots(); assert(!Roots.empty() && "All regunits must have a root register."); @@ -858,7 +858,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, // Emit the register list now. OS << " // " << Name << " Register Class...\n" - << " const uint16_t " << Name + << " const MCPhysReg " << Name << "[] = {\n "; for (unsigned i = 0, e = Order.size(); i != e; ++i) { Record *Reg = Order[i]; @@ -1267,7 +1267,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, OS << "extern const MCRegisterDesc " << TargetName << "RegDesc[];\n"; OS << "extern const MCPhysReg " << TargetName << "RegDiffLists[];\n"; OS << "extern const char " << TargetName << "RegStrings[];\n"; - OS << "extern const uint16_t " << TargetName << "RegUnitRoots[][2];\n"; + OS << "extern const MCPhysReg " << TargetName << "RegUnitRoots[][2];\n"; OS << "extern const uint16_t " << TargetName << "SubRegIdxLists[];\n"; OS << "extern const MCRegisterInfo::SubRegCoveredBits " << TargetName << "SubRegIdxRanges[];\n"; |