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author | Tim Northover <tnorthover@apple.com> | 2014-05-15 11:16:32 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-05-15 11:16:32 +0000 |
commit | f61a467a5904a380ec9af743f2739ef68955ffb2 (patch) | |
tree | aa53fbe2c208260745e009b496bf294f0c683643 /utils/TableGen/CodeGenInstruction.h | |
parent | d74434656619d19e3e5c3dec79c6ccdaef567bec (diff) |
TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenInstruction.h')
-rw-r--r-- | utils/TableGen/CodeGenInstruction.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index dc39eb973b9..818d0e1d36d 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -336,7 +336,7 @@ namespace llvm { /// of them are matched by the operand, the second value should be -1. std::vector<std::pair<unsigned, int> > ResultInstOperandIndex; - CodeGenInstAlias(Record *R, CodeGenTarget &T); + CodeGenInstAlias(Record *R, unsigned Variant, CodeGenTarget &T); bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, Record *InstOpRec, bool hasSubOps, ArrayRef<SMLoc> Loc, |