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authorCraig Topper <craig.topper@gmail.com>2012-09-15 01:22:42 +0000
committerCraig Topper <craig.topper@gmail.com>2012-09-15 01:22:42 +0000
commit5974c31acbf5368ffc18b23c849d0c823f91f25e (patch)
tree15b85d48e246ae3f2252195d933302465207ccfd /utils/TableGen/AsmWriterEmitter.cpp
parentf934d159ae6b57f05d8163265b9deaa29315d2e7 (diff)
Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163959 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/AsmWriterEmitter.cpp')
-rw-r--r--utils/TableGen/AsmWriterEmitter.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 8c492887c8c..d0cd057cd34 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -575,13 +575,12 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
StringTable.add(AsmName);
}
- unsigned Entries = StringTable.layout();
+ StringTable.layout();
O << " static const char AsmStrs" << AltName << "[] = {\n";
StringTable.emit(O, printChar);
O << " };\n\n";
- O << " static const uint" << ((Entries > 0xffff) ? "32" : "16")
- << "_t RegAsmOffset" << AltName << "[] = {";
+ O << " static const uint32_t RegAsmOffset" << AltName << "[] = {";
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
if ((i % 14) == 0)
O << "\n ";
@@ -620,7 +619,7 @@ void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
emitRegisterNameString(O, "", Registers);
if (hasAltNames) {
- O << " const unsigned *RegAsmOffset;\n"
+ O << " const uint32_t *RegAsmOffset;\n"
<< " const char *AsmStrs;\n"
<< " switch(AltIdx) {\n"
<< " default: llvm_unreachable(\"Invalid register alt name index!\");\n";