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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-11 08:37:13 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-11 08:37:13 +0000
commit3ee0673e4f5f0324ecd0a65507009b0748ed072c (patch)
tree7dd01bbdd995ec7d1e33b71556b4ac7a84cc1f07 /test/MC/SystemZ
parentc48b55a33dc5cd898dc9e58c0a1650b8f24c3879 (diff)
[SystemZ] Allow 8-bit operands to RISBG
RISBG has three 8-bit operands (I3, I4 and I5). I'd originally restricted all three to 6 bits, since that's the only range we intended to use at the time. However, the top bit of I4 acts as a "zero" flag for RISBG, while the top bit of I3 acts as a "test" flag for RNSBG & co. This patch therefore allows them to have the full 8-bit range. I've left the fifth operand as a 6-bit value for now since the upper 2 bits have no defined meaning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186070 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/SystemZ')
-rw-r--r--test/MC/SystemZ/insn-bad.s8
-rw-r--r--test/MC/SystemZ/insn-good.s8
2 files changed, 8 insertions, 8 deletions
diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 24c77477e45..ea9a7edc01d 100644
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -2102,18 +2102,18 @@
#CHECK: error: invalid operand
#CHECK: risbg %r0,%r0,0,-1,0
#CHECK: error: invalid operand
-#CHECK: risbg %r0,%r0,0,64,0
+#CHECK: risbg %r0,%r0,0,256,0
#CHECK: error: invalid operand
#CHECK: risbg %r0,%r0,-1,0,0
#CHECK: error: invalid operand
-#CHECK: risbg %r0,%r0,64,0,0
+#CHECK: risbg %r0,%r0,256,0,0
risbg %r0,%r0,0,0,-1
risbg %r0,%r0,0,0,64
risbg %r0,%r0,0,-1,0
- risbg %r0,%r0,0,64,0
+ risbg %r0,%r0,0,256,0
risbg %r0,%r0,-1,0,0
- risbg %r0,%r0,64,0,0
+ risbg %r0,%r0,256,0,0
#CHECK: error: invalid operand
#CHECK: rll %r0,%r0,-524289
diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s
index 2309dfb903e..3adfa981cb9 100644
--- a/test/MC/SystemZ/insn-good.s
+++ b/test/MC/SystemZ/insn-good.s
@@ -5835,16 +5835,16 @@
#CHECK: risbg %r0, %r0, 0, 0, 0 # encoding: [0xec,0x00,0x00,0x00,0x00,0x55]
#CHECK: risbg %r0, %r0, 0, 0, 63 # encoding: [0xec,0x00,0x00,0x00,0x3f,0x55]
-#CHECK: risbg %r0, %r0, 0, 63, 0 # encoding: [0xec,0x00,0x00,0x3f,0x00,0x55]
-#CHECK: risbg %r0, %r0, 63, 0, 0 # encoding: [0xec,0x00,0x3f,0x00,0x00,0x55]
+#CHECK: risbg %r0, %r0, 0, 255, 0 # encoding: [0xec,0x00,0x00,0xff,0x00,0x55]
+#CHECK: risbg %r0, %r0, 255, 0, 0 # encoding: [0xec,0x00,0xff,0x00,0x00,0x55]
#CHECK: risbg %r0, %r15, 0, 0, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0x55]
#CHECK: risbg %r15, %r0, 0, 0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0x55]
#CHECK: risbg %r4, %r5, 6, 7, 8 # encoding: [0xec,0x45,0x06,0x07,0x08,0x55]
risbg %r0,%r0,0,0,0
risbg %r0,%r0,0,0,63
- risbg %r0,%r0,0,63,0
- risbg %r0,%r0,63,0,0
+ risbg %r0,%r0,0,255,0
+ risbg %r0,%r0,255,0,0
risbg %r0,%r15,0,0,0
risbg %r15,%r0,0,0,0
risbg %r4,%r5,6,7,8