diff options
| author | Tim Northover <tnorthover@apple.com> | 2014-05-15 12:11:02 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-15 12:11:02 +0000 |
| commit | 0a088b1fc5b98c303efdfe6103957b90c943b2e5 (patch) | |
| tree | efa9cdfb68b8204bc18141ab5cb0ddf8ecc3f193 /test/MC/Disassembler | |
| parent | 8b580ccba027481bc4a9da4f374e2f1a60695372 (diff) | |
ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
| -rw-r--r-- | test/MC/Disassembler/ARM64/advsimd.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/MC/Disassembler/ARM64/advsimd.txt b/test/MC/Disassembler/ARM64/advsimd.txt index 1efccbd3bf0..cceee672dfd 100644 --- a/test/MC/Disassembler/ARM64/advsimd.txt +++ b/test/MC/Disassembler/ARM64/advsimd.txt @@ -124,10 +124,10 @@ # CHECK: smov.s x3, v2[2] # CHECK: smov.s x3, v2[2] -# CHECK: umov.s w3, v2[2] -# CHECK: umov.s w3, v2[2] -# CHECK: umov.d x3, v2[1] -# CHECK: umov.d x3, v2[1] +# CHECK: mov.s w3, v2[2] +# CHECK: mov.s w3, v2[2] +# CHECK: mov.d x3, v2[1] +# CHECK: mov.d x3, v2[1] 0xa2 0x1c 0x18 0x4e 0xa2 0x1c 0x0c 0x4e @@ -445,7 +445,7 @@ # CHECK: frsqrte.2s v0, v0 # CHECK: fsqrt.2s v0, v0 # CHECK: neg.8b v0, v0 -# CHECK: not.8b v0, v0 +# CHECK: mvn.8b v0, v0 # CHECK: rbit.8b v0, v0 # CHECK: rev16.8b v0, v0 # CHECK: rev32.8b v0, v0 |