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author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-02 14:15:33 +0000 |
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committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-02 14:15:33 +0000 |
commit | 1c9dfadec14f5113e84f105ce0a4a1238b116965 (patch) | |
tree | 2cbd92192d0642ba18641c888ebc0643eedca63f /test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll | |
parent | 250dc1dfab9b01f232a485e4ae2e02a32aae8be2 (diff) |
Merge master branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165011 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll')
-rw-r--r-- | test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll b/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll new file mode 100644 index 00000000000..75766099a22 --- /dev/null +++ b/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mcpu=cortex-a8 2>&1 | FileCheck %s + +; Check for error message: +; CHECK: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type + +define void @f() nounwind ssp { + %1 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } asm "vldm $4, { ${0:q}, ${1:q}, ${2:q}, ${3:q} }", "=r,=r,=r,=r,r"(i64* undef) nounwind, !srcloc !0 + ret void +} + +!0 = metadata !{i32 318437} |