diff options
| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-06-10 18:42:51 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-06-10 18:42:51 +0000 |
| commit | 3c98ce242e4b0f24e6b0dbcf47c5e06c54038419 (patch) | |
| tree | 9f8d3850286c0d29390b00059a280b5cbf130f0d /test/Bitcode | |
| parent | 01a90f4f8fc7187883377f69e2725ab5e23cc393 (diff) | |
Add AutoUpgrade support for the SSE4 ptest intrinsics.
Patch by Michael Kuperstein.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158295 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Bitcode')
| -rw-r--r-- | test/Bitcode/ptest-new.ll | 22 | ||||
| -rw-r--r-- | test/Bitcode/ptest-old.ll | 22 |
2 files changed, 44 insertions, 0 deletions
diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll new file mode 100644 index 00000000000..276fb7ab6a1 --- /dev/null +++ b/test/Bitcode/ptest-new.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s + +define i32 @foo(<2 x i64> %bar) nounwind { +entry: +; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64> + %res1 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %bar, <2 x i64> %bar) +; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64> + %res2 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %bar, <2 x i64> %bar) +; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> + %res3 = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %bar, <2 x i64> %bar) + %add1 = add i32 %res1, %res2 + %add2 = add i32 %add1, %res2 + ret i32 %add2 +} + +; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone +; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone +; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone + +declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll new file mode 100644 index 00000000000..fc6ed8ef7b6 --- /dev/null +++ b/test/Bitcode/ptest-old.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s + +define i32 @foo(<4 x float> %bar) nounwind { +entry: +; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64> + %res1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %bar, <4 x float> %bar) +; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64> + %res2 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %bar, <4 x float> %bar) +; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> + %res3 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %bar, <4 x float> %bar) + %add1 = add i32 %res1, %res2 + %add2 = add i32 %add1, %res2 + ret i32 %add2 +} + +; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone +; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone +; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone + +declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone |