diff options
author | Roman Divacky <rdivacky@freebsd.org> | 2011-08-30 17:04:16 +0000 |
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committer | Roman Divacky <rdivacky@freebsd.org> | 2011-08-30 17:04:16 +0000 |
commit | 0aaa9195b53e693eb8618fef305e3799b5b77771 (patch) | |
tree | ca220202dc4808cd9a032a9255fcc845a71a19fc /lib | |
parent | e7815c22fc1f6beb38500745904209d2c6bbf3fd (diff) |
Set CR1EQ only when lowering vararg floating arguments (not any vararg
arguments as before), unset CR1EQ otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 8 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 4 |
2 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index f3917c4575b..be94b08e75a 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2946,6 +2946,7 @@ PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee, SmallVector<TailCallArgumentInfo, 8> TailCallArguments; SmallVector<SDValue, 8> MemOpChains; + bool seenFloatArg = false; // Walk the register/memloc assignments, inserting copies/loads. for (unsigned i = 0, j = 0, e = ArgLocs.size(); i != e; @@ -2990,6 +2991,7 @@ PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee, } if (VA.isRegLoc()) { + seenFloatArg |= VA.getLocVT().isFloatingPoint(); // Put argument in a physical register. RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else { @@ -3016,9 +3018,11 @@ PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee, Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], MemOpChains.size()); - // Set CR6 to true if this is a vararg call. + // Set CR6 to true if this is a vararg call with floating args passed in + // registers. if (isVarArg) { - SDValue SetCR(DAG.getMachineNode(PPC::CRSET, dl, MVT::i32), 0); + SDValue SetCR(DAG.getMachineNode(seenFloatArg ? PPC::CRSET : PPC::CRUNSET, + dl, MVT::i32), 0); RegsToPass.push_back(std::make_pair(unsigned(PPC::CR1EQ), SetCR)); } diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 2b837b06414..f248b5ba8c4 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1053,6 +1053,10 @@ def CRSET : XLForm_1_ext<19, 289, (outs CRBITRC:$dst), (ins), "creqv $dst, $dst, $dst", BrCR, []>; +def CRUNSET: XLForm_1_ext<19, 193, (outs CRBITRC:$dst), (ins), + "crxor $dst, $dst, $dst", BrCR, + []>; + // XFX-Form instructions. Instructions that deal with SPRs. // let Uses = [CTR] in { |