diff options
| author | Jack Carter <jack.carter@imgtec.com> | 2013-04-15 22:21:55 +0000 |
|---|---|---|
| committer | Jack Carter <jack.carter@imgtec.com> | 2013-04-15 22:21:55 +0000 |
| commit | b8145e3881872fffbac15693c94536446f060330 (patch) | |
| tree | b61b7cda938b0b17eaee1195df4057613aebcfa4 /lib | |
| parent | 3fe91a4453cad041f038398de978679106b5ed67 (diff) | |
Mips assembler: Explicit floating point condition register recognition.
This patch allows the assembler to recognize $fcc0
as a valid register for conditional move instructions.
Corresponding test cases have been added.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179567 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index c403f216b0d..e8319f100f9 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -778,6 +778,9 @@ int MipsAsmParser::matchCPURegisterName(StringRef Name) { } int MipsAsmParser::matchRegisterName(StringRef Name, bool is64BitReg) { + if (Name.equals("fcc0")) + return Mips::FCC0; + int CC; CC = matchCPURegisterName(Name); if (CC != -1) |