diff options
| author | Vincent Lejeune <vljn@ovi.com> | 2012-10-03 22:28:59 +0200 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-10-12 15:46:31 +0000 |
| commit | d34bf4b3924be6540867641cea5859f5b805ba58 (patch) | |
| tree | 29c220310dcb65025b8cb7720dd841ae76589afe /lib | |
| parent | 73ea4dd79859ba2f84365e8b5ae374e04aa2e59f (diff) | |
R600: add support for cos/sin intrinsic
Patch by: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/AMDGPU/AMDGPUIntrinsics.td | 2 | ||||
| -rw-r--r-- | lib/Target/AMDGPU/R600Instructions.td | 17 |
2 files changed, 11 insertions, 8 deletions
diff --git a/lib/Target/AMDGPU/AMDGPUIntrinsics.td b/lib/Target/AMDGPU/AMDGPUIntrinsics.td index feca038b221..c5a7bebb745 100644 --- a/lib/Target/AMDGPU/AMDGPUIntrinsics.td +++ b/lib/Target/AMDGPU/AMDGPUIntrinsics.td @@ -21,7 +21,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_arl : Intrinsic<[llvm_i32_ty], [llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_cndlt : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]>; - def int_AMDGPU_cos : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_div : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_dp4 : Intrinsic<[llvm_float_ty], [llvm_v4f32_ty, llvm_v4f32_ty], [IntrNoMem]>; def int_AMDGPU_floor : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>; @@ -35,7 +34,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_seq : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_sgt : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_sge : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; - def int_AMDGPU_sin : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_sle : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_sne : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; def int_AMDGPU_ssg : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>; diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td index db6139fa61f..9c0b6f7edb2 100644 --- a/lib/Target/AMDGPU/R600Instructions.td +++ b/lib/Target/AMDGPU/R600Instructions.td @@ -915,8 +915,13 @@ let Predicates = [isR600] in { // Helper pattern for normalizing inputs to triginomic instructions for R700+ // cards. -class TRIG_eg <InstR600 trig, Intrinsic intr> : Pat< - (intr R600_Reg32:$src), +class COS_PAT <InstR600 trig> : Pat< + (fcos R600_Reg32:$src), + (trig (MUL (MOV_IMM_I32 (i32 ALU_LITERAL_X), CONST.TWO_PI_INV), R600_Reg32:$src)) +>; + +class SIN_PAT <InstR600 trig> : Pat< + (fsin R600_Reg32:$src), (trig (MUL (MOV_IMM_I32 (i32 ALU_LITERAL_X), CONST.TWO_PI_INV), R600_Reg32:$src)) >; @@ -929,8 +934,8 @@ let Predicates = [isR700] in { def COS_r700 : COS_Common<0x6F>; // R700 normalizes inputs to SIN/COS the same as EG - def : TRIG_eg <SIN_r700, int_AMDGPU_sin>; - def : TRIG_eg <COS_r700, int_AMDGPU_cos>; + def : SIN_PAT <SIN_r700>; + def : COS_PAT <COS_r700>; } //===----------------------------------------------------------------------===// @@ -1007,8 +1012,8 @@ let Predicates = [isEGorCayman] in { def SSG_eg : SSG_Common<CNDGT_eg, CNDGE_eg>; def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>; - def : TRIG_eg <SIN_eg, int_AMDGPU_sin>; - def : TRIG_eg <COS_eg, int_AMDGPU_cos>; + def : SIN_PAT <SIN_eg>; + def : COS_PAT <COS_eg>; def FLT_TO_INT_eg : FLT_TO_INT_Common<0x50> { let Pattern = []; |